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SN74LS126ADR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · SOIC-14

SN74LS126ADR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1G	input	Output enable for channel 1; on the '126/LS126A the outputs are disabled when G is low, so G is active-high enable (the overbar shown for the '125 variant does not apply).
2	1A	input	Data input for channel 1; for the LS126A, IIL is -0.4 mA max at VI = 0.4 V and IIH is 20 µA max at VI = 2.7 V.
3	1Y	tri_state	Three-state buffer output for channel 1; when enabled it sinks up to 24 mA (IOL max) and sources up to -2.6 mA (IOH max), and it is high-impedance when disabled.
4	2G	input	Output enable for channel 2; on the '126/LS126A the outputs are disabled when G is low, so G is active-high enable.
5	2A	input	Data input for channel 2; for the LS126A, IIL is -0.4 mA max at VI = 0.4 V and IIH is 20 µA max at VI = 2.7 V.
6	2Y	tri_state	Three-state buffer output for channel 2; when enabled it sinks up to 24 mA (IOL max) and sources up to -2.6 mA (IOH max), and it is high-impedance when disabled.
7	GND	power_in	Ground reference for the device; voltages are referenced to the network ground terminal.
8	3Y	tri_state	Three-state buffer output for channel 3; when enabled it sinks up to 24 mA (IOL max) and sources up to -2.6 mA (IOH max), and it is high-impedance when disabled.
9	3A	input	Data input for channel 3; for the LS126A, IIL is -0.4 mA max at VI = 0.4 V and IIH is 20 µA max at VI = 2.7 V.
10	3G	input	Output enable for channel 3; on the '126/LS126A the outputs are disabled when G is low, so G is active-high enable.
11	4Y	tri_state	Three-state buffer output for channel 4; when enabled it sinks up to 24 mA (IOL max) and sources up to -2.6 mA (IOH max), and it is high-impedance when disabled.
12	4A	input	Data input for channel 4; for the LS126A, IIL is -0.4 mA max at VI = 0.4 V and IIH is 20 µA max at VI = 2.7 V.
13	4G	input	Output enable for channel 4; on the '126/LS126A the outputs are disabled when G is low, so G is active-high enable.
14	VCC	power_in	Supply voltage: 4.75 V min, 5 V nominal, 5.25 V max for the SN74LS126A, with operating free-air temperature 0 °C to 70 °C.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Logic
Pins	14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Supply voltage (recommended)	VCC	4.75	5	5.25	V		6
High-level input voltage	VIH	2			V		6
Low-level input voltage	VIL			0.8	V		6
High-level output current	IOH	-2.6			mA		6
Low-level output current	IOL			24	mA		6
Operating free-air temperature	TA	0		70	°C		6
Supply voltage (absolute maximum)	VCC			7	V	Voltage values with respect to network ground terminal	4
Input voltage (absolute maximum)	VI			7	V	'LS125A and 'LS126A	4
Storage temperature range	Tstg	-65		150	°C		4
Package thermal impedance, D package	θJA		86		°C/W	D package, calculated per JESD 51-7	4
Input clamp voltage	VIK			-1.5	V	VCC=MIN, II=-18 mA	6
High-level output voltage	VOH	2.4			V	VCC=MIN, VIH=2 V, VIL=0.8 V, IOH=-2.6 mA	6
Low-level output voltage	VOL		0.25	0.4	V	VCC=MIN, VIH=2 V, VIL=0.8 V, IOL=12 mA	6
Low-level output voltage	VOL		0.35	0.5	V	VCC=MIN, VIH=2 V, VIL=0.8 V, IOL=24 mA	6
Off-state output current, high-level voltage applied	IOZ			20	µA	VCC=MAX, VIH=2 V, VIL=0.8 V, VO=2.4 V	6
Off-state output current, low-level voltage applied	IOZ	-20			µA	VCC=MAX, VIH=2 V, VIL=0.8 V, VO=0.4 V	6
Input current at maximum input voltage	II			0.1	mA	VCC=MAX, VI=7 V	6
High-level input current	IIH			20	µA	VCC=MAX, VI=2.7 V	6
Low-level input current	IIL			-0.4	mA	VCC=MAX, VI=0.4 V, all inputs of 'LS126A	6
Short-circuit output current	IOS	-40		-225	mA	VCC=MAX	6
Supply current, LS126A	ICC		12	22	mA	VCC=MAX, data inputs=0 V, output control=0 V (see Note 4)	6
Output enable time to high level, LS126A	tPZH		16	25	ns	VCC=5 V, TA=25°C, RL=667 Ω, CL=45 pF	6
Output enable time to low level, LS126A	tPZL		21	35	ns	VCC=5 V, TA=25°C, RL=667 Ω, CL=45 pF	6

CAD (KiCad official)

Symbol: SN74LS126ADR
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: sn74ls126adr-etched.step / sn74ls126adr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls126adr.step / sn74ls126adr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (28 pp, sha256 f3be4110bb5f169b, retrieved 2026-10-18, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF