component
SN74LS11N
Public Made by Adomby adom
XBLW Logic Gates, DIP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS11N
XBLW · Logic Gates · DIP-14
SN74LS11N from XBLW, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input A of gate 1; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 2 | 1B | input | Data input B of gate 1; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 3 | 2A | input | Data input A of gate 2; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 4 | 2B | input | Data input B of gate 2; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 5 | 2C | input | Data input C of gate 2; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 6 | 2Y | output | Data output of gate 2; it is HIGH only when 2A, 2B and 2C are all HIGH, otherwise LOW. |
| 7 | GND | power_in | Ground reference (0 V) for the device. |
| 8 | 3Y | output | Data output of gate 3; it is HIGH only when 3A, 3B and 3C are all HIGH, otherwise LOW. |
| 9 | 3A | input | Data input A of gate 3; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 10 | 3B | input | Data input B of gate 3; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 11 | 3C | input | Data input C of gate 3; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 12 | 1Y | output | Data output of gate 1; it is HIGH only when 1A, 1B and 1C are all HIGH, otherwise LOW. |
| 13 | 1C | input | Data input C of gate 1; the inputs include clamp diodes and are buffered, so current-limiting resistors can interface them to voltages above VCC. |
| 14 | VCC | power_in | Supply voltage; recommended operating range is 2.0 V to 6.0 V with 5.0 V typical. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | XBLW |
| Package | DIP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| supply voltage | VCC | -0.5 | 7 | V | 5 | ||
| input clamping current | IIK | -20 | 20 | mA | VI<-0.5V or VI>VCC+0.5V | 5 | |
| output clamping current | IOK | -20 | 20 | mA | VO<-0.5V or VO>VCC+0.5V | 5 | |
| output current | IO | -25 | 25 | mA | -0.5V<VO<VCC+0.5V | 5 | |
| supply current | ICC | 50 | mA | 5 | |||
| ground current | IGND | -50 | mA | 5 | |||
| total power dissipation | Ptot | 500 | mW | 5 | |||
| storage temperature | Tstg | -65 | 150 | ℃ | 5 | ||
| supply voltage | VCC | 2 | 5 | 6 | V | 5 | |
| input voltage | VI | 0 | V | 5 | |||
| output voltage | VO | 0 | V | 5 | |||
| input transition rise and fall rate | Δt/ΔV | 625 | ns/V | VCC=2.0V | 5 | ||
| input transition rise and fall rate | Δt/ΔV | 1.67 | 139 | ns/V | VCC=4.5V | 5 | |
| input transition rise and fall rate | Δt/ΔV | 83 | ns/V | VCC=6.0V | 5 | ||
| ambient temperature | Tamb | -20 | 85 | ℃ | 5 | ||
| HIGH-level input voltage | VIH | 1.5 | 1.2 | V | Tamb=25℃; VCC=2.0V | 6 | |
| HIGH-level input voltage | VIH | 3.15 | 2.4 | V | Tamb=25℃; VCC=4.5V | 6 | |
| HIGH-level input voltage | VIH | 4.2 | 3.2 | V | Tamb=25℃; VCC=6.0V | 6 | |
| LOW-level input voltage | VIL | 0.8 | 0.5 | V | Tamb=25℃; VCC=2.0V | 6 | |
| LOW-level input voltage | VIL | 2.1 | 1.35 | V | Tamb=25℃; VCC=4.5V | 6 | |
| LOW-level input voltage | VIL | 2.8 | 1.8 | V | Tamb=25℃; VCC=6.0V | 6 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 6 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 6 | |
| HIGH-level output voltage | VOH | 5.9 | 6 | V | Tamb=25℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 6 | |
| HIGH-level output voltage | VOH | 3.98 | 4.32 | V | Tamb=25℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 6 | |
| HIGH-level output voltage | VOH | 5.48 | 5.81 | V | Tamb=25℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 6 | |
| LOW-level output voltage | VOL | 0 | 0.1 | V | Tamb=25℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 6 | |
| LOW-level output voltage | VOL | 0.15 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 6 | |
| LOW-level output voltage | VOL | 0.16 | 0.26 | V | Tamb=25℃; VI=VIH or VIL; IO=5.2mA; VCC=6.0V | 6 | |
| input leakage current | II | -1 | 1 | uA | Tamb=25℃; VI=VCC or GND; VCC=6.0V | 6 | |
| supply current | ICC | 2 | uA | Tamb=25℃; VI=VCC or GND; IO=0A; VCC=6.0V | 6 | ||
| input capacitance | CI | 3.5 | pF | Tamb=25℃ | 6 | ||
| HIGH-level input voltage | VIH | 1.5 | V | Tamb=-20℃ to +85℃; VCC=2.0V | 6 | ||
| HIGH-level input voltage | VIH | 3.15 | V | Tamb=-20℃ to +85℃; VCC=4.5V | 6 | ||
| HIGH-level input voltage | VIH | 4.2 | V | Tamb=-20℃ to +85℃; VCC=6.0V | 6 | ||
| LOW-level input voltage | VIL | 0.5 | V | Tamb=-20℃ to +85℃; VCC=2.0V | 6 | ||
| LOW-level input voltage | VIL | 1.35 | V | Tamb=-20℃ to +85℃; VCC=4.5V | 6 | ||
| LOW-level input voltage | VIL | 1.8 | V | Tamb=-20℃ to +85℃; VCC=6.0V | 6 | ||
| HIGH-level output voltage | VOH | 1.9 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=2.0V | 6 | ||
| HIGH-level output voltage | VOH | 4.4 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=4.5V | 6 | ||
| HIGH-level output voltage | VOH | 5.9 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=-20uA; VCC=6.0V | 6 | ||
| HIGH-level output voltage | VOH | 3.84 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=-4.0mA; VCC=4.5V | 6 | ||
| HIGH-level output voltage | VOH | 5.34 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=-5.2mA; VCC=6.0V | 6 | ||
| LOW-level output voltage | VOL | 0.1 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=20uA; VCC=2.0V | 6 | ||
| LOW-level output voltage | VOL | 0.33 | V | Tamb=-20℃ to +85℃; VI=VIH or VIL; IO=4.0mA; VCC=4.5V | 6 | ||
| supply current | ICC | 20 | uA | Tamb=-20℃ to +85℃; VI=VCC or GND; IO=0A; VCC=6.0V | 6 | ||
| propagation delay nA, nB, nC to nY | tpd | 32 | 100 | ns | Tamb=25℃; VCC=2.0V; see Figure 5 | 7 | |
| propagation delay nA, nB, nC to nY | tpd | 12 | 20 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 7 | |
| propagation delay nA, nB, nC to nY | tpd | 10 | 17 | ns | Tamb=25℃; VCC=6.0V; see Figure 5 | 7 | |
| transition time | tt | 19 | 75 | ns | Tamb=25℃; VCC=2.0V; see Figure 5 | 7 | |
| transition time | tt | 7 | 15 | ns | Tamb=25℃; VCC=4.5V; see Figure 5 | 7 | |
| propagation delay nA, nB, nC to nY | tpd | 125 | ns | Tamb=-20℃ to +85℃; VCC=2.0V; see Figure 5 | 7 | ||
| propagation delay nA, nB, nC to nY | tpd | 25 | ns | Tamb=-20℃ to +85℃; VCC=4.5V; see Figure 5 | 7 | ||
| propagation delay nA, nB, nC to nY | tpd | 21 | ns | Tamb=-20℃ to +85℃; VCC=6.0V; see Figure 5 | 7 |
CAD (KiCad official)
- Symbol:
SN74LS11N - Footprint:
Package_DIP:DIP-14_W7.62mm - 3D model: DIP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74ls11n-etched.step/sn74ls11n-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls11n.step/sn74ls11n.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: XBLW datasheet (12 pp, sha256
8ecef428eeb6e064, retrieved 2026-10-14, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).