# SN74LS09NSR

**Texas Instruments** · Logic Gates · SOIC-14-208mil

SN74LS09NSR from Texas Instruments, in a SOIC-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Gate 1 input A; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 2 | 1B | input | Gate 1 input B; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 3 | 1Y | output | Gate 1 open-collector output that requires an external pull-up resistor, with off-state voltage up to 5.5 V recommended and IOL max 8 mA for SN74LS09. |
| 4 | 2A | input | Gate 2 input A; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 5 | 2B | input | Gate 2 input B; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 6 | 2Y | output | Gate 2 open-collector output that requires an external pull-up resistor, with off-state voltage up to 5.5 V recommended and IOL max 8 mA for SN74LS09. |
| 7 | GND | power_in | Ground reference; all voltage values in the datasheet are given with respect to this network ground terminal. |
| 8 | 3Y | output | Gate 3 open-collector output that requires an external pull-up resistor, with off-state voltage up to 5.5 V recommended and IOL max 8 mA for SN74LS09. |
| 9 | 3A | input | Gate 3 input A; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 10 | 3B | input | Gate 3 input B; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 11 | 4Y | output | Gate 4 open-collector output that requires an external pull-up resistor, with off-state voltage up to 5.5 V recommended and IOL max 8 mA for SN74LS09. |
| 12 | 4A | input | Gate 4 input A; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 13 | 4B | input | Gate 4 input B; high-level input voltage min 2 V and low-level max 0.8 V for SN74LS09 operation. |
| 14 | VCC | power_in | Supply voltage, recommended 4.75 V to 5.25 V for SN74LS09 with an absolute maximum of 7 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14-208mil |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `SN74LS09NSR`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14-208mil (KiCad packages3D, STEP)
- 3D model files: `sn74ls09nsr-etched.step` / `sn74ls09nsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74ls09nsr.step` / `sn74ls09nsr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74ls09.pdf) (23 pp, sha256 `679be881beb0f1b2`, retrieved 2026-11-06, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74ls09nsr-datasheet.pdf)