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SN74LS08DBR
Public Made by Adomby adom
Texas Instruments Logic Gates, SSOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74LS08DBR
Texas Instruments · Logic Gates · SSOP-14-208mil
SN74LS08DBR from Texas Instruments, in a SSOP-14-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of gate 1; TTL-compatible, VIH min 2 V, VIL max 0.8 V (SN74LS08 recommended operating conditions). |
| 2 | 1B | input | Input B of gate 1; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 3 | 1Y | output | AND output of gate 1 (Y = A·B); VOH min 2.7 V (typ 3.4 V), VOL max 0.5 V at IOL = 8 mA. |
| 4 | 2A | input | Input A of gate 2; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 5 | 2B | input | Input B of gate 2; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 6 | 2Y | output | AND output of gate 2 (Y = A·B); VOH min 2.7 V (typ 3.4 V), VOL max 0.5 V at IOL = 8 mA. |
| 7 | GND | power_in | Ground reference (0 V); all voltages referenced to this terminal. |
| 8 | 3Y | output | AND output of gate 3 (Y = A·B); VOH min 2.7 V (typ 3.4 V), VOL max 0.5 V at IOL = 8 mA. |
| 9 | 3A | input | Input A of gate 3; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 10 | 3B | input | Input B of gate 3; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 11 | 4Y | output | AND output of gate 4 (Y = A·B); VOH min 2.7 V (typ 3.4 V), VOL max 0.5 V at IOL = 8 mA. |
| 12 | 4A | input | Input A of gate 4; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 13 | 4B | input | Input B of gate 4; TTL-compatible, VIH min 2 V, VIL max 0.8 V. |
| 14 | VCC | power_in | Positive supply voltage; recommended 4.75 V to 5.25 V (nom 5 V), absolute maximum 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SSOP-14-208mil |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74LS08DBR - Footprint:
Package_SO:SSOP-14_5.3x6.2mm_P0.65mm - 3D model: SSOP-14-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74ls08dbr-etched.step/sn74ls08dbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74ls08dbr.step/sn74ls08dbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
b17b9ffe25184de9, retrieved 2026-09-27, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-4-6(text+vision), consensusclaude-opus-4-7(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).