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Ray Publish 0.1.0 4990375 9d ago

SN74LS01N

XBLW · Logic Gates · DIP-14

SN74LS01N from XBLW, in a DIP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Data output of gate 1 (open-drain NAND output).
2 1A input Data input A of gate 1.
3 1B input Data input B of gate 1.
4 2Y output Data output of gate 2 (open-drain NAND output).
5 2A input Data input A of gate 2.
6 2B input Data input B of gate 2.
7 GND power_in Ground (0V).
8 3A input Data input A of gate 3.
9 3B input Data input B of gate 3.
10 3Y output Data output of gate 3 (open-drain NAND output).
11 4A input Data input A of gate 4.
12 4B input Data input B of gate 4.
13 4Y output Data output of gate 4 (open-drain NAND output).
14 VCC power_in Supply voltage, operating range 2 to 6 V.

Key specifications

Parameter Value
Manufacturer XBLW
Package DIP-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LS01N
  • Footprint: Package_DIP:DIP-14_W7.62mm
  • 3D model: DIP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls01n-etched.step / sn74ls01n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls01n.step / sn74ls01n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: XBLW datasheet (11 pp, sha256 8a22e27e7f014e6d, retrieved 2026-10-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF