component
SN74LS00NSR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOP-14-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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page.json+16−13@@ -53,37 +53,37 @@ "number": "1", "name": "1A", "type": "input",- "description": "Gate 1 input A; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 1 input A; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "2", "name": "1B", "type": "input",- "description": "Gate 1 input B; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 1 input B; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "3", "name": "1Y", "type": "output",- "description": "Gate 1 output; NAND output Y = 1A\u00b71B (IOL 8mA per operating conditions)"+ "description": "Gate 1 output; NAND output Y = 1A·1B (IOL 8mA per operating conditions)" }, { "number": "4", "name": "2A", "type": "input",- "description": "Gate 2 input A; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 2 input A; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "5", "name": "2B", "type": "input",- "description": "Gate 2 input B; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 2 input B; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "6", "name": "2Y", "type": "output",- "description": "Gate 2 output; NAND output Y = 2A\u00b72B (IOL 8mA per operating conditions)"+ "description": "Gate 2 output; NAND output Y = 2A·2B (IOL 8mA per operating conditions)" }, { "number": "7",@@ -95,37 +95,37 @@ "number": "8", "name": "3Y", "type": "output",- "description": "Gate 3 output; NAND output Y = 3A\u00b73B (IOL 8mA per operating conditions)"+ "description": "Gate 3 output; NAND output Y = 3A·3B (IOL 8mA per operating conditions)" }, { "number": "9", "name": "3B", "type": "input",- "description": "Gate 3 input B; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 3 input B; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "10", "name": "3A", "type": "input",- "description": "Gate 3 input A; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 3 input A; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "11", "name": "4Y", "type": "output",- "description": "Gate 4 output; NAND output Y = 4A\u00b74B (IOL 8mA per operating conditions)"+ "description": "Gate 4 output; NAND output Y = 4A·4B (IOL 8mA per operating conditions)" }, { "number": "12", "name": "4B", "type": "input",- "description": "Gate 4 input B; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 4 input B; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "13", "name": "4A", "type": "input",- "description": "Gate 4 input A; TTL-compatible 2-input NAND input (VIH \u2265 2V, VIL \u2264 0.8V)"+ "description": "Gate 4 input A; TTL-compatible 2-input NAND input (VIH ≥ 2V, VIL ≤ 0.8V)" }, { "number": "14",@@ -209,5 +209,8 @@ "docs/sn74ls00nsr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }