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Contents

README

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SN74LS00DR

Texas Instruments · Logic Gates · SOIC-14

SN74LS00DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Gate 1 input A, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
2 1B input Gate 1 input B, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
3 1Y output Gate 1 NAND output, performs Y = A·B logic with IOL = 8 mA max at low level.
4 2A input Gate 2 input A, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
5 2B input Gate 2 input B, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
6 2Y output Gate 2 NAND output, performs Y = A·B logic with IOL = 8 mA max at low level.
7 GND power_in Ground reference, 0V supply return.
8 3Y output Gate 3 NAND output, performs Y = A·B logic with IOL = 8 mA max at low level.
9 3B input Gate 3 input B, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
10 3A input Gate 3 input A, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
11 4Y output Gate 4 NAND output, performs Y = A·B logic with IOL = 8 mA max at low level.
12 4B input Gate 4 input B, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
13 4A input Gate 4 input A, TTL-compatible with VIH = 2V min and VIL = 0.8V max.
14 VCC power_in Positive power supply, operating range 4.75V to 5.25V for SN74LS00.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-14
Category Logic
Pins 14

CAD (KiCad official)

  • Symbol: SN74LS00DR
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: sn74ls00dr-etched.step / sn74ls00dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74ls00dr.step / sn74ls00dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 ac4bbf6801413a20, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF