component
SN74LS00D
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
sn74ls00d: factory component page (tier=lcsc)
3 files changed
+15953−35
page.json+56−35@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74ls00d",+ "title": "SN74LS00D",+ "brief": "Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "logic",@@ -10,24 +13,6 @@ "factory-2.0.0", "extractor-text" ],- "dependencies": {},- "hero": {- "type": "image",- "path": "docs/hero.png"- },- "files": [- "page.json",- "README.md",- "sn74ls00d.kicad_sym",- "sn74ls00d.kicad_mod",- "sn74ls00d.glb",- "sn74ls00d.step",- "sn74ls00d.lbr",- "docs/hero.png",- "docs/sn74ls00d-datasheet.pdf",- "viewers/symbol.html",- "viewers/footprint.html"- ], "component": { "mpn": "SN74LS00D", "manufacturer": "Texas Instruments",@@ -69,37 +54,37 @@ "number": "1", "name": "1A", "type": "input",- "description": "NAND gate 1 first input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 1 first input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "2", "name": "1B", "type": "input",- "description": "NAND gate 1 second input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 1 second input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "3", "name": "1Y", "type": "output",- "description": "NAND gate 1 output; sources ≤ 0.4 mA when high or sinks ≤ 8 mA when low."+ "description": "NAND gate 1 output; sources \u2264 0.4 mA when high or sinks \u2264 8 mA when low." }, { "number": "4", "name": "2A", "type": "input",- "description": "NAND gate 2 first input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 2 first input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "5", "name": "2B", "type": "input",- "description": "NAND gate 2 second input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 2 second input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "6", "name": "2Y", "type": "output",- "description": "NAND gate 2 output; sources ≤ 0.4 mA when high or sinks ≤ 8 mA when low."+ "description": "NAND gate 2 output; sources \u2264 0.4 mA when high or sinks \u2264 8 mA when low." }, { "number": "7",@@ -111,37 +96,37 @@ "number": "8", "name": "3Y", "type": "output",- "description": "NAND gate 3 output; sources ≤ 0.4 mA when high or sinks ≤ 8 mA when low."+ "description": "NAND gate 3 output; sources \u2264 0.4 mA when high or sinks \u2264 8 mA when low." }, { "number": "9", "name": "3B", "type": "input",- "description": "NAND gate 3 second input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 3 second input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "10", "name": "3A", "type": "input",- "description": "NAND gate 3 first input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 3 first input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "11", "name": "4Y", "type": "output",- "description": "NAND gate 4 output; sources ≤ 0.4 mA when high or sinks ≤ 8 mA when low."+ "description": "NAND gate 4 output; sources \u2264 0.4 mA when high or sinks \u2264 8 mA when low." }, { "number": "12", "name": "4B", "type": "input",- "description": "NAND gate 4 second input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 4 second input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "13", "name": "4A", "type": "input",- "description": "NAND gate 4 first input; accepts VIH ≥ 2V and VIL ≤ 0.8V logic levels."+ "description": "NAND gate 4 first input; accepts VIH \u2265 2V and VIL \u2264 0.8V logic levels." }, { "number": "14",@@ -184,10 +169,46 @@ "footprint": "viewers/footprint.html" } },- "visibility": "public",- "org": "adom",+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "SOIC-14",+ "Category": "Logic",+ "Pins": "14"+ }+ },+ "variants": [],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "sn74ls00d"+ ],+ "discovery_pitch": "SN74LS00D (Texas Instruments) component page: datasheet pinout, KiCad symbol, footprint and 3D.", "author": { "name": "Ray", "email": "[email protected]"- }+ },+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "sn74ls00d.kicad_sym",+ "sn74ls00d.kicad_mod",+ "sn74ls00d.glb",+ "sn74ls00d.step",+ "sn74ls00d.lbr",+ "docs/hero.png",+ "docs/sn74ls00d-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ] }
sn74ls00d-etched.glbadded⋯ 1 unchanged line ⋯
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