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Initial commit: component/sn74hct74pwr

Ray ·778570d9f3 ·1d ago
2 files changed +285
README.mdadded+50
@@ -0,0 +1,50 @@+# SN74HCT74PWR++**Texas Instruments** · Flip Flops · TSSOP-14++SN74HCT74PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1CLR | input | Active-low asynchronous clear for flip-flop 1; a low level resets the outputs regardless of the other inputs. |+| 2 | 1D | input | Data input of flip-flop 1, transferred to the outputs on the positive-going edge of 1CLK. |+| 3 | 1CLK | input | Clock input of flip-flop 1, positive-edge triggered. |+| 4 | 1PRE | input | Active-low asynchronous preset for flip-flop 1; a low level sets the outputs regardless of the other inputs. |+| 5 | 1Q | output | True output of flip-flop 1, drives up to 10 LSTTL loads (±4 mA at 5 V). |+| 6 | 1Q̅ | output | Complementary output of flip-flop 1, drives up to 10 LSTTL loads (±4 mA at 5 V). |+| 7 | GND | power_in | Ground. |+| 8 | 2Q̅ | output | Complementary output of flip-flop 2, drives up to 10 LSTTL loads (±4 mA at 5 V). |+| 9 | 2Q | output | True output of flip-flop 2, drives up to 10 LSTTL loads (±4 mA at 5 V). |+| 10 | 2PRE | input | Active-low asynchronous preset for flip-flop 2; a low level sets the outputs regardless of the other inputs. |+| 11 | 2CLK | input | Clock input of flip-flop 2, positive-edge triggered. |+| 12 | 2D | input | Data input of flip-flop 2, transferred to the outputs on the positive-going edge of 2CLK. |+| 13 | 2CLR | input | Active-low asynchronous clear for flip-flop 2; a low level resets the outputs regardless of the other inputs. |+| 14 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended, with a 0.1-µF bypass capacitor placed close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Logic |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `SN74HCT74PWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `sn74hct74pwr-etched.step` / `sn74hct74pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hct74pwr.step` / `sn74hct74pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hct74.pdf) (33 pp, sha256 `213add794847c059`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hct74pwr-datasheet.pdf)
page.jsonadded+235
@@ -0,0 +1,235 @@+{+  "slug": "sn74hct74pwr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Flip Flops, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hct74pwr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hct74pwr.kicad_sym",+    "sn74hct74pwr.kicad_mod",+    "sn74hct74pwr.glb",+    "sn74hct74pwr.step",+    "sn74hct74pwr.lbr",+    "docs/hero.png",+    "docs/sn74hct74pwr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "sn74hct74pwr-hero.glb",+    "sn74hct74pwr-hero.overlay.json"+  ],+  "component": {+    "mpn": "SN74HCT74PWR",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-14",+    "pin_count": 14,+    "category": "Logic",+    "subcategory": "Flip Flops",+    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hct74.pdf",+    "parts": {+      "symbol": "sn74hct74pwr.kicad_sym",+      "footprint": "sn74hct74pwr.kicad_mod",+      "model_3d": "sn74hct74pwr-hero.glb",+      "model_3d_plain": "sn74hct74pwr.glb",+      "model_3d_step": "sn74hct74pwr-etched.step",+      "model_3d_step_plain": "sn74hct74pwr.step",+      "lbr": "sn74hct74pwr.lbr"+    },+    "distributor_links": {+      "lcsc": "C141335",+      "digikey": "296-8429-2-ND",+      "mouser": "595-SN74HCT74PWR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T20:32:04Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-8429-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-SN74HCT74PWR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1CLR",+        "type": "input",+        "description": "Active-low asynchronous clear for flip-flop 1; a low level resets the outputs regardless of the other inputs."+      },+      {+        "number": "2",+        "name": "1D",+        "type": "input",+        "description": "Data input of flip-flop 1, transferred to the outputs on the positive-going edge of 1CLK."+      },+      {+        "number": "3",+        "name": "1CLK",+        "type": "input",+        "description": "Clock input of flip-flop 1, positive-edge triggered."+      },+      {+        "number": "4",+        "name": "1PRE",+        "type": "input",+        "description": "Active-low asynchronous preset for flip-flop 1; a low level sets the outputs regardless of the other inputs."+      },+      {+        "number": "5",+        "name": "1Q",+        "type": "output",+        "description": "True output of flip-flop 1, drives up to 10 LSTTL loads (±4 mA at 5 V)."+      },+      {+        "number": "6",+        "name": "1Q̅",+        "type": "output",+        "description": "Complementary output of flip-flop 1, drives up to 10 LSTTL loads (±4 mA at 5 V)."+      },+      {+        "number": "7",+        "name": "GND",+        "type": "power_in",+        "description": "Ground."+      },+      {+        "number": "8",+        "name": "2Q̅",+        "type": "output",+        "description": "Complementary output of flip-flop 2, drives up to 10 LSTTL loads (±4 mA at 5 V)."+      },+      {+        "number": "9",+        "name": "2Q",+        "type": "output",+        "description": "True output of flip-flop 2, drives up to 10 LSTTL loads (±4 mA at 5 V)."+      },+      {+        "number": "10",+        "name": "2PRE",+        "type": "input",+        "description": "Active-low asynchronous preset for flip-flop 2; a low level sets the outputs regardless of the other inputs."+      },+      {+        "number": "11",+        "name": "2CLK",+        "type": "input",+        "description": "Clock input of flip-flop 2, positive-edge triggered."+      },+      {+        "number": "12",+        "name": "2D",+        "type": "input",+        "description": "Data input of flip-flop 2, transferred to the outputs on the positive-going edge of 2CLK."+      },+      {+        "number": "13",+        "name": "2CLR",+        "type": "input",+        "description": "Active-low asynchronous clear for flip-flop 2; a low level resets the outputs regardless of the other inputs."+      },+      {+        "number": "14",+        "name": "VCC",+        "type": "power_in",+        "description": "Supply voltage, 4.5 V to 5.5 V recommended, with a 0.1-µF bypass capacitor placed close to the pin."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-sonnet-5-5",+        "primary_mode": "text+vision",+        "consensus_model": "claude-opus-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "vision extraction: provenance cannot be text-verified; needs consensus"+        ],+        "pages_sent": 33,+        "cost_usd": 0.518,+        "at": "2026-10-08T20:31:46"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/sn74hct74.pdf",+        "pages": 33,+        "sha256": "213add794847c059",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 14,+        "described": 14,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "sn74hct74pwr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "sn74hct74pwr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6.4,+          5,+          1+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "85e07124f6d17d4cf24da5a18118ff0d77275768f75807952b6a374aadfc5c03",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file