component
SN74HCT74DR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
sn74hct74dr: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
2 files changed
+96−16
package.json+54−14@@ -53,13 +53,13 @@ "number": "1", "name": "1CLR", "type": "input",- "description": "Active-low asynchronous clear for flip-flop 1; drives Q1=L, Q\u03041=H regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V."+ "description": "Active-low asynchronous clear for flip-flop 1; drives Q1=L, Q̄1=H regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V." }, { "number": "2", "name": "1D", "type": "input",- "description": "Data input for flip-flop 1; captured on the positive-going CLK edge when PRE and CLR are inactive (high); setup time \u2265 12 ns, hold time \u2265 0 ns at VCC = 4.5 V."+ "description": "Data input for flip-flop 1; captured on the positive-going CLK edge when PRE and CLR are inactive (high); setup time ≥ 12 ns, hold time ≥ 0 ns at VCC = 4.5 V." }, { "number": "3",@@ -71,43 +71,43 @@ "number": "4", "name": "1PRE", "type": "input",- "description": "Active-low asynchronous preset for flip-flop 1; drives Q1=H, Q\u03041=L regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V."+ "description": "Active-low asynchronous preset for flip-flop 1; drives Q1=H, Q̄1=L regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V." }, { "number": "5", "name": "1Q", "type": "output",- "description": "Non-inverting output of flip-flop 1; VOH \u2265 3.98 V at IOH = \u22124 mA, VOL \u2264 0.26 V at IOL = 4 mA (VCC = 4.5 V); tpd 28 ns typ from CLK at 4.5 V."+ "description": "Non-inverting output of flip-flop 1; VOH ≥ 3.98 V at IOH = −4 mA, VOL ≤ 0.26 V at IOL = 4 mA (VCC = 4.5 V); tpd 28 ns typ from CLK at 4.5 V." }, { "number": "6", "name": "~{1Q}", "type": "output",- "description": "Inverting (complementary) output of flip-flop 1; always the logical complement of 1Q; same drive ratings as 1Q (VOH \u2265 3.98 V at IOH = \u22124 mA, VOL \u2264 0.26 V at IOL = 4 mA)."+ "description": "Inverting (complementary) output of flip-flop 1; always the logical complement of 1Q; same drive ratings as 1Q (VOH ≥ 3.98 V at IOH = −4 mA, VOL ≤ 0.26 V at IOL = 4 mA)." }, { "number": "7", "name": "GND", "type": "power_in",- "description": "Ground supply reference (0 V); continuous current through GND pin \u00b150 mA maximum."+ "description": "Ground supply reference (0 V); continuous current through GND pin ±50 mA maximum." }, { "number": "8", "name": "~{2Q}", "type": "output",- "description": "Inverting (complementary) output of flip-flop 2; always the logical complement of 2Q; VOH \u2265 3.98 V at IOH = \u22124 mA, VOL \u2264 0.26 V at IOL = 4 mA (VCC = 4.5 V)."+ "description": "Inverting (complementary) output of flip-flop 2; always the logical complement of 2Q; VOH ≥ 3.98 V at IOH = −4 mA, VOL ≤ 0.26 V at IOL = 4 mA (VCC = 4.5 V)." }, { "number": "9", "name": "2Q", "type": "output",- "description": "Non-inverting output of flip-flop 2; VOH \u2265 3.98 V at IOH = \u22124 mA, VOL \u2264 0.26 V at IOL = 4 mA (VCC = 4.5 V); tpd 28 ns typ from CLK at 4.5 V."+ "description": "Non-inverting output of flip-flop 2; VOH ≥ 3.98 V at IOH = −4 mA, VOL ≤ 0.26 V at IOL = 4 mA (VCC = 4.5 V); tpd 28 ns typ from CLK at 4.5 V." }, { "number": "10", "name": "2PRE", "type": "input",- "description": "Active-low asynchronous preset for flip-flop 2; drives Q2=H, Q\u03042=L regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V."+ "description": "Active-low asynchronous preset for flip-flop 2; drives Q2=H, Q̄2=L regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V." }, { "number": "11",@@ -119,19 +119,19 @@ "number": "12", "name": "2D", "type": "input",- "description": "Data input for flip-flop 2; captured on the positive-going CLK edge when PRE and CLR are inactive (high); setup time \u2265 12 ns, hold time \u2265 0 ns at VCC = 4.5 V."+ "description": "Data input for flip-flop 2; captured on the positive-going CLK edge when PRE and CLR are inactive (high); setup time ≥ 12 ns, hold time ≥ 0 ns at VCC = 4.5 V." }, { "number": "13", "name": "2CLR", "type": "input",- "description": "Active-low asynchronous clear for flip-flop 2; drives Q2=L, Q\u03042=H regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V."+ "description": "Active-low asynchronous clear for flip-flop 2; drives Q2=L, Q̄2=H regardless of other inputs; minimum pulse width 16 ns at VCC = 4.5 V." }, { "number": "14", "name": "VCC", "type": "power_in",- "description": "Positive supply voltage; recommended operating range 4.5 V to 5.5 V; quiescent ICC max 40 \u03bcA at VCC = 5.5 V."+ "description": "Positive supply voltage; recommended operating range 4.5 V to 5.5 V; quiescent ICC max 40 μA at VCC = 5.5 V." } ], "provenance": {@@ -168,6 +168,46 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "sn74hct74dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 8.7,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74hct74dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 8.7,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "250a53fc2a6ebdf3b6d66432b6da6e01ed6936284f15e443d08b80990a472a9f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }-}+}
page.json+42−2@@ -153,7 +153,47 @@ "viewers": { "symbol": "viewers/symbol.html", "footprint": "viewers/footprint.html"- }+ },+ "models_3d": [+ {+ "file": "sn74hct74dr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 8.7,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "sn74hct74dr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.0,+ 8.7,+ 1.75+ ],+ "zmin_mm": -0.0,+ "centre_offset_mm": 0.0,+ "footprint_binding": "identity",+ "sha256": "250a53fc2a6ebdf3b6d66432b6da6e01ed6936284f15e443d08b80990a472a9f",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ] }, "metadata": { "specs": {@@ -201,4 +241,4 @@ "public": true }, "updated_at": "2026-09-25T07:15:29.936Z"-}+}