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SN74HCT574DBR

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Texas Instruments Flip Flops, SSOP-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HCT574DBR

Texas Instruments · Flip Flops · SSOP-20-208mil

SN74HCT574DBR from Texas Instruments, in a SSOP-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output Enable input for first group (1Y1-1Y4); active-low enables outputs to logic levels, active-high places outputs in high impedance.
2 1A1 input Data input for first flip-flop of first group; latched on rising clock edge when 1OE is low with setup time tsu = 25ns max and hold time th = 5ns.
3 2Y4 tri_state Tri-state output for fourth flip-flop of second group; outputs logic level when 2OE is low (tpd = 45ns max), high impedance when 2OE is high (tdis = 38ns max).
4 1A2 input Data input for second flip-flop of first group; latched on rising clock edge when 1OE is low with setup time tsu = 25ns max and hold time th = 5ns.
5 2Y3 tri_state Tri-state output for third flip-flop of second group; outputs logic level when 2OE is low (tpd = 45ns max), high impedance when 2OE is high (tdis = 38ns max).
6 1A3 input Data input for third flip-flop of first group; latched on rising clock edge when 1OE is low with setup time tsu = 25ns max and hold time th = 5ns.
7 2Y2 tri_state Tri-state output for second flip-flop of second group; outputs logic level when 2OE is low (tpd = 45ns max), high impedance when 2OE is high (tdis = 38ns max).
8 1A4 input Data input for fourth flip-flop of first group; latched on rising clock edge when 1OE is low with setup time tsu = 25ns max and hold time th = 5ns.
9 2Y1 tri_state Tri-state output for first flip-flop of second group; outputs logic level when 2OE is low (tpd = 45ns max), high impedance when 2OE is high (tdis = 38ns max).
10 GND power_in Ground; circuit common and return path for all signals and power supply.
11 2A1 input Data input for first flip-flop of second group; latched on rising clock edge when 2OE is low with setup time tsu = 25ns max and hold time th = 5ns.
12 1Y4 tri_state Tri-state output for fourth flip-flop of first group; outputs logic level when 1OE is low (tpd = 45ns max), high impedance when 1OE is high (tdis = 38ns max).
13 2A2 input Data input for second flip-flop of second group; latched on rising clock edge when 2OE is low with setup time tsu = 25ns max and hold time th = 5ns.
14 1Y3 tri_state Tri-state output for third flip-flop of first group; outputs logic level when 1OE is low (tpd = 45ns max), high impedance when 1OE is high (tdis = 38ns max).
15 2A3 input Data input for third flip-flop of second group; latched on rising clock edge when 2OE is low with setup time tsu = 25ns max and hold time th = 5ns.
16 1Y2 tri_state Tri-state output for second flip-flop of first group; outputs logic level when 1OE is low (tpd = 45ns max), high impedance when 1OE is high (tdis = 38ns max).
17 2A4 input Data input for fourth flip-flop of second group; latched on rising clock edge when 2OE is low with setup time tsu = 25ns max and hold time th = 5ns.
18 1Y1 tri_state Tri-state output for first flip-flop of first group; outputs logic level when 1OE is low (tpd = 45ns max), high impedance when 1OE is high (tdis = 38ns max).
19 2OE input Output Enable input for second group (2Y1-2Y4); active-low enables outputs to logic levels, active-high places outputs in high impedance.
20 VCC power_in Power supply voltage input; operating range 4.5V to 5.5V per recommended operating conditions for SN74HCT574.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SSOP-20-208mil
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HCT574DBR
  • Footprint: Package_SO:SSOP-20_5.3x7.2mm_P0.65mm
  • 3D model: SSOP-20-208mil (KiCad packages3D, STEP)
  • 3D model files: sn74hct574dbr-etched.step / sn74hct574dbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct574dbr.step / sn74hct574dbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 3288661ec63c48f4, retrieved 2026-09-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF