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SN74HCT244QPWREP

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Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74hct244qpwrepfactory-2.0.0extractor-text

Verified SN74HCT244QPWREP

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 20 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74HCT244QPWREP · TSSOP-20 · 20 pins
  • ✓copper: 20 copper pads, none touching another net
  • ✓datasheet: all 20 pin names found in the 12-page datasheet
  • ✓distributor: lcsc C2876973, digikey 296-22304-2-ND, mouser 595-SN74HCT244QPWREP
  • ✓family: TSSOP-20_4.4x6.5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-e4aaj00f/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.9)
  • ✓pads: 20 pins = 20 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 20 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74hct244qpwrep.kicad_sym✓ sn74hct244qpwrep.kicad_mod✓ sn74hct244qpwrep.step
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Ray Publish 0.1.0 9e62c4f 12h ago

SN74HCT244QPWREP

Texas Instruments · Buffer/Driver/Transceiver · TSSOP-20

SN74HCT244QPWREP from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-low output enable for buffer 1: when low the 1Y outputs pass the 1A inputs noninverted, and when high the 1Y outputs are in the high-impedance state.
2 1A1 input Data input 1 of buffer 1, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
3 2Y4 tri_state 3-state output 4 of buffer 2, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
4 1A2 input Data input 2 of buffer 1, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
5 2Y3 tri_state 3-state output 3 of buffer 2, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
6 1A3 input Data input 3 of buffer 1, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
7 2Y2 tri_state 3-state output 2 of buffer 2, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
8 1A4 input Data input 4 of buffer 1, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
9 2Y1 tri_state 3-state output 1 of buffer 2, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
10 GND power_in Device ground reference pin.
11 2A1 input Data input 1 of buffer 2, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
12 1Y4 tri_state 3-state output 4 of buffer 1, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
13 2A2 input Data input 2 of buffer 2, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
14 1Y3 tri_state 3-state output 3 of buffer 1, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
15 2A3 input Data input 3 of buffer 2, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
16 1Y2 tri_state 3-state output 2 of buffer 1, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
17 2A4 input Data input 4 of buffer 2, TTL-voltage compatible with a low input current of 1 µA max; unused inputs must be held at VCC or GND.
18 1Y1 tri_state 3-state output 1 of buffer 1, rated for ±6 mA output drive at 5 V and up to 15 LSTTL loads.
19 2OE input Active-low output enable for buffer 2: when low the 2Y outputs pass the 2A inputs noninverted, and when high the 2Y outputs are in the high-impedance state.
20 VCC power_in Supply voltage pin; recommended operating range is 4.5 V to 5.5 V with 5 V nominal.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5 5.5 V 2
High-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V 2
Low-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V 2
Input voltage VI 0 V Maximum printed as VCC 2
Output voltage VO 0 V Maximum printed as VCC 2
Input transition rise/fall time Δt/Δv 500 ns 2
Operating free-air temperature TA -40 125 °C 2
Supply voltage range VCC -0.5 7 V 2
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 2
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC 2
Continuous output current IO -35 35 mA VO = 0 to VCC 2
Continuous current through VCC or GND -70 70 mA 2
Storage temperature range Tstg -65 150 °C 2
Package thermal impedance θJA 83 °C/W Per JESD 51-7 2
High-level output voltage VOH 4.4 4.499 V VI = VIH or VIL; IOH = −20 µA; VCC = 4.5 V 3
High-level output voltage VOH 3.7 4.3 V VI = VIH or VIL; IOH = −6 mA; VCC = 4.5 V 3
Low-level output voltage VOL 0.001 0.1 V VI = VIH or VIL; IOL = 20 µA; VCC = 4.5 V 3
Low-level output voltage VOL 0.17 0.4 V VI = VIH or VIL; IOL = 6 mA; VCC = 4.5 V 3
Input current II -1000 0.1 1000 nA VI = VCC or 0; VCC = 5.5 V 3
Off-state (high-impedance) output current IOZ -10 0.01 10 µA VO = VCC or 0; VI = VIH or VIL; VCC = 5.5 V 3
Supply current ICC 8 160 µA VI = VCC or 0; IO = 0; VCC = 5.5 V 3
Increase in supply current per TTL-level input ΔICC 1.4 3 mA One input at 0.5 V or 2.4 V, other inputs at 0 or VCC; VCC = 5.5 V 3
Input capacitance Ci 3 10 pF VCC = 4.5 V to 5.5 V 3
Propagation delay time, A to Y tpd 15 28 42 ns CL = 50 pF; VCC = 4.5 V 3
Propagation delay time, A to Y tpd 13 25 38 ns CL = 50 pF; VCC = 5.5 V 3
Enable time, OE to Y ten 21 35 53 ns CL = 50 pF; VCC = 4.5 V 3
Enable time, OE to Y ten 19 32 48 ns CL = 50 pF; VCC = 5.5 V 3
Disable time, OE to Y tdis 19 35 53 ns CL = 50 pF; VCC = 4.5 V 3
Disable time, OE to Y tdis 18 32 48 ns CL = 50 pF; VCC = 5.5 V 3
Transition time, Y tt 8 12 18 ns CL = 50 pF; VCC = 4.5 V 3
Transition time, Y tt 7 11 16 ns CL = 50 pF; VCC = 5.5 V 3
Propagation delay time, A to Y tpd 21 45 68 ns CL = 150 pF; VCC = 4.5 V 3
Propagation delay time, A to Y tpd 18 40 61 ns CL = 150 pF; VCC = 5.5 V 3
Enable time, OE to Y ten 25 52 79 ns CL = 150 pF; VCC = 4.5 V 3
Enable time, OE to Y ten 22 47 71 ns CL = 150 pF; VCC = 5.5 V 3
Transition time, Y tt 17 42 63 ns CL = 150 pF; VCC = 4.5 V 3
Transition time, Y tt 14 38 57 ns CL = 150 pF; VCC = 5.5 V 3

CAD (KiCad official)

  • Symbol: SN74HCT244QPWREP
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hct244qpwrep-etched.step / sn74hct244qpwrep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct244qpwrep.step / sn74hct244qpwrep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (12 pp, sha256 433f60d6886a3548, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF