SN74HCT244PWR

{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hct244pwr",
  "title": "SN74HCT244PWR",
  "brief": "Texas Instruments Buffer/Driver/Transceiver, TSSOP-20. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.2.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "component",
    "logic",
    "sn74hct244pwr"
  ],
  "component": {
    "mpn": "SN74HCT244PWR",
    "manufacturer": "Texas Instruments",
    "package": "TSSOP-20",
    "pin_count": 20,
    "category": "Logic",
    "subcategory": "Buffer/Driver/Transceiver",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hct244.pdf",
    "parts": {
      "symbol": "sn74hct244pwr.kicad_sym",
      "footprint": "sn74hct244pwr.kicad_mod",
      "model_3d": "sn74hct244pwr-etched.glb",
      "model_3d_plain": "sn74hct244pwr.glb",
      "model_3d_step": "sn74hct244pwr-etched.step",
      "model_3d_step_plain": "sn74hct244pwr.step",
      "lbr": "sn74hct244pwr.lbr"
    },
    "distributor_links": {
      "digikey": "296-8402-2-ND",
      "lcsc": "C6778"
    },
    "pins": [
      {
        "number": "1",
        "name": "1OE",
        "type": "input",
        "description": "Active-low output enable for bank 1 (buffers 1A1-1A4 → 1Y1-1Y4). When low, bank 1 outputs pass the A input data. When high, bank 1 outputs are placed in the high-impedance state. Must be tied to VCC through a pull-up for high-Z during power up/down."
      },
      {
        "number": "2",
        "name": "1A1",
        "type": "input",
        "description": "Bank 1 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 1Y1 when 1OE is low. VIH ≥ 2 V, VIL ≤ 0.8 V at VCC = 4.5-5.5 V; input current ≤ ±1 µA."
      },
      {
        "number": "3",
        "name": "2Y4",
        "type": "tri_state",
        "description": "Bank 2 buffer output 4. 3-state, non-inverting output driven by 2A4 when 2OE is low; high-impedance when 2OE is high. ±6 mA output drive at 5 V."
      },
      {
        "number": "4",
        "name": "1A2",
        "type": "input",
        "description": "Bank 1 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 1Y2 when 1OE is low."
      },
      {
        "number": "5",
        "name": "2Y3",
        "type": "tri_state",
        "description": "Bank 2 buffer output 3. 3-state, non-inverting output driven by 2A3 when 2OE is low; high-impedance when 2OE is high."
      },
      {
        "number": "6",
        "name": "1A3",
        "type": "input",
        "description": "Bank 1 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 1Y3 when 1OE is low."
      },
      {
        "number": "7",
        "name": "2Y2",
        "type": "tri_state",
        "description": "Bank 2 buffer output 2. 3-state, non-inverting output driven by 2A2 when 2OE is low; high-impedance when 2OE is high."
      },
      {
        "number": "8",
        "name": "1A4",
        "type": "input",
        "description": "Bank 1 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 1Y4 when 1OE is low."
      },
      {
        "number": "9",
        "name": "2Y1",
        "type": "tri_state",
        "description": "Bank 2 buffer output 1. 3-state, non-inverting output driven by 2A1 when 2OE is low; high-impedance when 2OE is high."
      },
      {
        "number": "10",
        "name": "GND",
        "type": "power_in",
        "description": "Device ground reference (0 V)."
      },
      {
        "number": "11",
        "name": "2A1",
        "type": "input",
        "description": "Bank 2 buffer input 1. TTL-compatible CMOS input; buffered non-inverting to 2Y1 when 2OE is low."
      },
      {
        "number": "12",
        "name": "1Y4",
        "type": "tri_state",
        "description": "Bank 1 buffer output 4. 3-state, non-inverting output driven by 1A4 when 1OE is low; high-impedance when 1OE is high."
      },
      {
        "number": "13",
        "name": "2A2",
        "type": "input",
        "description": "Bank 2 buffer input 2. TTL-compatible CMOS input; buffered non-inverting to 2Y2 when 2OE is low."
      },
      {
        "number": "14",
        "name": "1Y3",
        "type": "tri_state",
        "description": "Bank 1 buffer output 3. 3-state, non-inverting output driven by 1A3 when 1OE is low; high-impedance when 1OE is high."
      },
      {
        "number": "15",
        "name": "2A3",
        "type": "input",
        "description": "Bank 2 buffer input 3. TTL-compatible CMOS input; buffered non-inverting to 2Y3 when 2OE is low."
      },
      {
        "number": "16",
        "name": "1Y2",
        "type": "tri_state",
        "description": "Bank 1 buffer output 2. 3-state, non-inverting output driven by 1A2 when 1OE is low; high-impedance when 1OE is high."
      },
      {
        "number": "17",
        "name": "2A4",
        "type": "input",
        "description": "Bank 2 buffer input 4. TTL-compatible CMOS input; buffered non-inverting to 2Y4 when 2OE is low."
      },
      {
        "number": "18",
        "name": "1Y1",
        "type": "tri_state",
        "description": "Bank 1 buffer output 1. 3-state, non-inverting output driven by 1A1 when 1OE is low; high-impedance when 1OE is high."
      },
      {
        "number": "19",
        "name": "2OE",
        "type": "input",
        "description": "Active-low output enable for bank 2 (buffers 2A1-2A4 → 2Y1-2Y4). When low, bank 2 outputs pass the A input data. When high, bank 2 outputs are placed in the high-impedance state."
      },
      {
        "number": "20",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply rail, 4.5 V to 5.5 V (recommended). Absolute max 7 V. Decouple locally to GND with a 0.1 µF ceramic capacitor."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hct244.pdf",
        "pages": 38,
        "sha256": "5d3df17f40ffa6fd",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 20,
        "described": 20,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "pin1": {
      "pad": "1",
      "at": [
        -2.8625,
        -2.925
      ],
      "corner": "top-left",
      "source": "silk-marker",
      "derived_from": "TSSOP-20_4.4x6.5mm_P0.65mm@sha256:b7ca3a31dd45c122",
      "mark": "drawn"
    },
    "logic": {
      "family_id": "74HCT244",
      "logic_family": "74HCT",
      "function_code": "244",
      "function_class": "Buffer",
      "function_name": "Octal Buffer/Driver, Non-Inverting, 3-State",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hct244pwr.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "97339947f3a7196470ec2f1d9f9b92bb2fc2ab66ad53be0cf105192585ef3c9a",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hct244pwr-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.4,
          6.5,
          1.2
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "90883649fda0479767002688649ae561213629f0dc789c2019cf11de93167af9",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "TSSOP-20",
      "Category": "Logic",
      "Pins": "20"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "sn74hct244pwr"
  ],
  "discovery_pitch": "SN74HCT244PWR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hct244pwr.kicad_sym",
    "sn74hct244pwr.kicad_mod",
    "sn74hct244pwr.glb",
    "sn74hct244pwr.step",
    "sn74hct244pwr-etched.step",
    "sn74hct244pwr.lbr",
    "docs/hero.png",
    "docs/sn74hct244pwr-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html"
  ],
  "visibility": {
    "public": true
  },
  "variants": [
    {
      "mpn": "SN74HCT244PWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDB",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDBR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDW",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDWR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRN",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRNS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRNSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDGS",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRDGSR",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRJ",
      "kind": "packaging"
    },
    {
      "mpn": "SN74HCT244PWRFK",
      "kind": "packaging"
    }
  ],
  "updated_at": "2026-09-25T07:13:59.251Z"
}