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Initial commit: component/sn74hct240nsr

Ray ·f003841398 ·8d ago
2 files changed +287
README.mdadded+57
@@ -0,0 +1,57 @@+# SN74HCT240NSR++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-20-208mil++SN74HCT240NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Output Enable 1 input (active low); controls tri-state outputs of section 1 buffers (1Y1-1Y4). |+| 2 | 1A1 | input | Input A1 for section 1 buffer; inverted output appears on 1Y1 when 1OE is low. |+| 3 | 2Y4 | tri_state | Tri-state output Y4 for section 2; drives inverted version of input 2A4 when 2OE is low, otherwise high impedance. |+| 4 | 1A2 | input | Input A2 for section 1 buffer; inverted output appears on 1Y2 when 1OE is low. |+| 5 | 2Y3 | tri_state | Tri-state output Y3 for section 2; drives inverted version of input 2A3 when 2OE is low, otherwise high impedance. |+| 6 | 1A3 | input | Input A3 for section 1 buffer; inverted output appears on 1Y3 when 1OE is low. |+| 7 | 2Y2 | tri_state | Tri-state output Y2 for section 2; drives inverted version of input 2A2 when 2OE is low, otherwise high impedance. |+| 8 | 1A4 | input | Input A4 for section 1 buffer; inverted output appears on 1Y4 when 1OE is low. |+| 9 | 2Y1 | tri_state | Tri-state output Y1 for section 2; drives inverted version of input 2A1 when 2OE is low, otherwise high impedance. |+| 10 | GND | power_in | Ground reference pin. |+| 11 | 2A1 | input | Input A1 for section 2 buffer; inverted output appears on 2Y1 when 2OE is low. |+| 12 | 1Y4 | tri_state | Tri-state output Y4 for section 1; drives inverted version of input 1A4 when 1OE is low, otherwise high impedance. |+| 13 | 2A2 | input | Input A2 for section 2 buffer; inverted output appears on 2Y2 when 2OE is low. |+| 14 | 1Y3 | tri_state | Tri-state output Y3 for section 1; drives inverted version of input 1A3 when 1OE is low, otherwise high impedance. |+| 15 | 2A3 | input | Input A3 for section 2 buffer; inverted output appears on 2Y3 when 2OE is low. |+| 16 | 1Y2 | tri_state | Tri-state output Y2 for section 1; drives inverted version of input 1A2 when 1OE is low, otherwise high impedance. |+| 17 | 2A4 | input | Input A4 for section 2 buffer; inverted output appears on 2Y4 when 2OE is low. |+| 18 | 1Y1 | tri_state | Tri-state output Y1 for section 1; drives inverted version of input 1A1 when 1OE is low, otherwise high impedance. |+| 19 | 2OE | input | Output Enable 2 input (active low); controls tri-state outputs of section 2 buffers (2Y1-2Y4). |+| 20 | VCC | power_in | Positive power supply pin; nominal 5V with operating range 4.5V to 5.5V per section 4.2. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20-208mil |+| Category | Logic |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `SN74HCT240NSR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-208mil (KiCad packages3D, STEP)+- 3D model files: `sn74hct240nsr-etched.step` / `sn74hct240nsr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hct240nsr.step` / `sn74hct240nsr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hct240) (30 pp, sha256 `898d3fff8f0abec6`, retrieved 2026-09-27, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/sn74hct240nsr-datasheet.pdf)
page.jsonadded+230
@@ -0,0 +1,230 @@+{+  "slug": "sn74hct240nsr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "sn74hct240nsr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "sn74hct240nsr.kicad_sym",+    "sn74hct240nsr.kicad_mod",+    "sn74hct240nsr.glb",+    "sn74hct240nsr.step",+    "sn74hct240nsr.lbr",+    "docs/hero.png",+    "docs/sn74hct240nsr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "SN74HCT240NSR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-20-208mil",+    "pin_count": 20,+    "category": "Logic",+    "subcategory": "Buffers, Drivers, Receivers, Transceivers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/sn74hct240",+    "parts": {+      "symbol": "sn74hct240nsr.kicad_sym",+      "footprint": "sn74hct240nsr.kicad_mod",+      "model_3d": "sn74hct240nsr-etched.glb",+      "model_3d_plain": "sn74hct240nsr.glb",+      "model_3d_step": "sn74hct240nsr-etched.step",+      "model_3d_step_plain": "sn74hct240nsr.step",+      "lbr": "sn74hct240nsr.lbr"+    },+    "distributor_links": {+      "lcsc": "C6772",+      "digikey": "296-12899-2-ND",+      "mouser": "595-SN74HCT240NSR"+    },+    "distributor_check": {+      "checked_at": "2026-09-27T08:58:30Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-12899-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-SN74HCT240NSR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "1OE",+        "type": "input",+        "description": "Output Enable 1 input (active low); controls tri-state outputs of section 1 buffers (1Y1-1Y4)."+      },+      {+        "number": "2",+        "name": "1A1",+        "type": "input",+        "description": "Input A1 for section 1 buffer; inverted output appears on 1Y1 when 1OE is low."+      },+      {+        "number": "3",+        "name": "2Y4",+        "type": "tri_state",+        "description": "Tri-state output Y4 for section 2; drives inverted version of input 2A4 when 2OE is low, otherwise high impedance."+      },+      {+        "number": "4",+        "name": "1A2",+        "type": "input",+        "description": "Input A2 for section 1 buffer; inverted output appears on 1Y2 when 1OE is low."+      },+      {+        "number": "5",+        "name": "2Y3",+        "type": "tri_state",+        "description": "Tri-state output Y3 for section 2; drives inverted version of input 2A3 when 2OE is low, otherwise high impedance."+      },+      {+        "number": "6",+        "name": "1A3",+        "type": "input",+        "description": "Input A3 for section 1 buffer; inverted output appears on 1Y3 when 1OE is low."+      },+      {+        "number": "7",+        "name": "2Y2",+        "type": "tri_state",+        "description": "Tri-state output Y2 for section 2; drives inverted version of input 2A2 when 2OE is low, otherwise high impedance."+      },+      {+        "number": "8",+        "name": "1A4",+        "type": "input",+        "description": "Input A4 for section 1 buffer; inverted output appears on 1Y4 when 1OE is low."+      },+      {+        "number": "9",+        "name": "2Y1",+        "type": "tri_state",+        "description": "Tri-state output Y1 for section 2; drives inverted version of input 2A1 when 2OE is low, otherwise high impedance."+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference pin."+      },+      {+        "number": "11",+        "name": "2A1",+        "type": "input",+        "description": "Input A1 for section 2 buffer; inverted output appears on 2Y1 when 2OE is low."+      },+      {+        "number": "12",+        "name": "1Y4",+        "type": "tri_state",+        "description": "Tri-state output Y4 for section 1; drives inverted version of input 1A4 when 1OE is low, otherwise high impedance."+      },+      {+        "number": "13",+        "name": "2A2",+        "type": "input",+        "description": "Input A2 for section 2 buffer; inverted output appears on 2Y2 when 2OE is low."+      },+      {+        "number": "14",+        "name": "1Y3",+        "type": "tri_state",+        "description": "Tri-state output Y3 for section 1; drives inverted version of input 1A3 when 1OE is low, otherwise high impedance."+      },+      {+        "number": "15",+        "name": "2A3",+        "type": "input",+        "description": "Input A3 for section 2 buffer; inverted output appears on 2Y3 when 2OE is low."+      },+      {+        "number": "16",+        "name": "1Y2",+        "type": "tri_state",+        "description": "Tri-state output Y2 for section 1; drives inverted version of input 1A2 when 1OE is low, otherwise high impedance."+      },+      {+        "number": "17",+        "name": "2A4",+        "type": "input",+        "description": "Input A4 for section 2 buffer; inverted output appears on 2Y4 when 2OE is low."+      },+      {+        "number": "18",+        "name": "1Y1",+        "type": "tri_state",+        "description": "Tri-state output Y1 for section 1; drives inverted version of input 1A1 when 1OE is low, otherwise high impedance."+      },+      {+        "number": "19",+        "name": "2OE",+        "type": "input",+        "description": "Output Enable 2 input (active low); controls tri-state outputs of section 2 buffers (2Y1-2Y4)."+      },+      {+        "number": "20",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive power supply pin; nominal 5V with operating range 4.5V to 5.5V per section 4.2."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Package designation mismatch: user specified package hint 'SOIC-20-208mil', but MPN SN74HCT240NSR is"+        ],+        "pages_sent": 30,+        "cost_usd": 0.2851,+        "at": "2026-09-27T08:58:11"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/sn74hct240",+        "pages": 30,+        "sha256": "898d3fff8f0abec6",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 20,+        "described": 20,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file