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SN74HCT165PWR

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Texas Instruments Shift Registers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HCT165PWR

Texas Instruments · Shift Registers · TSSOP-16

SN74HCT165PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SH/LD input Enables shifting when high and loads the parallel data inputs when low.
2 CLK input Clock input, rising-edge triggered.
3 E input Parallel data input E.
4 F input Parallel data input F.
5 G input Parallel data input G.
6 H input Parallel data input H.
7 QH̅ output Inverted serial output.
8 GND power_in Ground.
9 QH output Serial output.
10 SER input Serial data input.
11 A input Parallel data input A.
12 B input Parallel data input B.
13 C input Parallel data input C.
14 D input Parallel data input D.
15 CLK INH input Clock inhibit input.
16 VCC power_in Positive supply; recommended operating range is 4.5 V to 5.5 V with 5 V nominal.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 4.5 5 5.5 V 4
High-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V 4
Low-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V 4
Input voltage VI 0 V 4
Output voltage VO 0 V 4
Input transition rise and fall rate Δt/Δv 500 ns/V VCC = 4.5 V to 5.5 V 4
Ambient temperature TA -40 125 °C 4
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VO < 0 or VO > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous output current through VCC or GND ICC -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
High-level output voltage (IOH = -20 µA) VOH 4.4 V VI = VIH or VIL, IOH = -20 uA, VCC = 4.5 V, TA = 25°C 5
High-level output voltage (IOH = -4 mA) VOH 3.98 V VI = VIH or VIL, IOH = -4 mA, VCC = 4.5 V, TA = 25°C 5
High-level output voltage (IOH = -4 mA) VOH 3.84 V VI = VIH or VIL, IOH = -4 mA, VCC = 4.5 V, TA = -40°C to 125°C 5
Low-level output voltage (IOL = 20 µA) VOL 0.1 V VI = VIH or VIL, IOL = 20 uA, VCC = 4.5 V, TA = 25°C 5
Low-level output voltage (IOL = 4 mA) VOL 0.26 V VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, TA = 25°C 5
Low-level output voltage (IOL = 4 mA) VOL 0.33 V VI = VIH or VIL, IOL = 4 mA, VCC = 4.5 V, TA = -40°C to 125°C 5
Input leakage current II -100 100 nA VI = VCC or 0, VCC = 5.5 V, TA = 25°C 5
Input leakage current II -1000 1000 nA VI = VCC or 0, VCC = 5.5 V, TA = -40°C to 125°C 5
Off-state (high-impedance state) output current IOZ -0.5 0.5 µA VO = VCC or 0, VCC = 5.5 V, QA-QH, TA = 25°C 5
Off-state (high-impedance state) output current IOZ -5 5 µA VO = VCC or 0, VCC = 5.5 V, QA-QH, TA = -40°C to 125°C 5
Supply current ICC 8 µA VI = VCC or 0, IO = 0, VCC = 5.5 V, TA = 25°C 5
Supply current ICC 80 µA VI = VCC or 0, IO = 0, VCC = 5.5 V, TA = -40°C to 125°C 5
Additional quiescent device current per input pin ΔICC 126.2 µA VI = VCC - 2.1 V, VCC = 4.5 V to 5.5 V, TA = 25°C 5
Additional quiescent device current per input pin ΔICC 157.5 µA VI = VCC - 2.1 V, VCC = 4.5 V to 5.5 V, TA = -40°C to 125°C 5
Additional quiescent device current per input pin ΔICC 2.4 mA VI = 0.5 V or 2.4 V, VCC = 5.5 V, TA = 25°C 5
Additional quiescent device current per input pin ΔICC 2.9 mA VI = 0.5 V or 2.4 V, VCC = 5.5 V, TA = -40°C to 125°C 5
Input capacitance Ci 10 pF VCC = 4.5 V to 5.5 V 5
Output capacitance CO 20 pF VCC = 4.5 V to 5.5 V 5
Power dissipation capacitance per gate Cpd 50 pF No load 5
Junction-to-ambient thermal resistance RθJA 131.8 °C/W PW (TSSOP), 16 pins 4
Junction-to-case (top) thermal resistance RθJC(top) 69.8 °C/W PW (TSSOP), 16 pins 4
Junction-to-board thermal resistance RθJB 76.5 °C/W PW (TSSOP), 16 pins 4
Junction-to-top characterization parameter ΨJT 20.9 °C/W PW (TSSOP), 16 pins 4
Junction-to-board characterization parameter YJB 76.1 °C/W PW (TSSOP), 16 pins 4

CAD (KiCad official)

  • Symbol: SN74HCT165PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hct165pwr-etched.step / sn74hct165pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct165pwr.step / sn74hct165pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 2cc53f10eaa35c01, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF