Loads when you scroll to it. Unloads after 5 minutes in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.

PCB Footprint

Open full view ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Loads when you scroll to it. Unloads after 5 minutes in the background.
Download PDF
Contents

README

markdown

SN74HCT157N

Texas Instruments · Signal Switches, Multiplexers, Decoders · PDIP-16

SN74HCT157N from Texas Instruments, in a PDIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A/B input Common select input that chooses the A or B data source for all four output channels (L selects A, H selects B, per the function table).
2 1A input Channel 1 data input from source A, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
3 1B input Channel 1 data input from source B, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
4 1Y output Channel 1 buffered output that follows the selected 1A or 1B input when G is low, and is forced low when G is high.
5 2A input Channel 2 data input from source A, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
6 2B input Channel 2 data input from source B, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
7 2Y output Channel 2 buffered output that follows the selected 2A or 2B input when G is low, and is forced low when G is high.
8 GND power_in Ground reference for the device.
9 3Y output Channel 3 buffered output that follows the selected 3A or 3B input when G is low, and is forced low when G is high.
10 3B input Channel 3 data input from source B, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
11 3A input Channel 3 data input from source A, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
12 4Y output Channel 4 buffered output that follows the selected 4A or 4B input when G is low, and is forced low when G is high.
13 4B input Channel 4 data input from source B, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
14 4A input Channel 4 data input from source A, a TTL-voltage-compatible buffered input with a maximum input current of 1 µA.
15 G input Active-high strobe: when G is high, all outputs are forced low regardless of the select and data inputs.
16 VCC power_in Supply voltage, recommended operating range 4.5 V to 5.5 V (5 V nominal).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package PDIP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74HCT157N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: PDIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hct157n-etched.step / sn74hct157n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hct157n.step / sn74hct157n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (13 pp, sha256 d0065a7dd3156de9, retrieved 2026-10-13, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF