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SN74HCT139DR
Public Made by Adomby adom
Texas Instruments Logic ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HCT139DR
Texas Instruments · Logic ICs · SOIC-16
SN74HCT139DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low enable input for decoder 1; can be used as a data line in demultiplexing applications. |
| 2 | 1A | input | Select input A (LSB) for decoder 1, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 3 | 1B | input | Select input B (MSB) for decoder 1, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 4 | 1Y0 | output | Decoder 1 output Y0, active low, driving ±4 mA at 5 V. |
| 5 | 1Y1 | output | Decoder 1 output Y1, active low, driving ±4 mA at 5 V. |
| 6 | 1Y2 | output | Decoder 1 output Y2, active low, driving ±4 mA at 5 V. |
| 7 | 1Y3 | output | Decoder 1 output Y3, active low, driving ±4 mA at 5 V. |
| 8 | GND | power_in | Ground pin. |
| 9 | 2Y3 | output | Decoder 2 output Y3, active low, driving ±4 mA at 5 V. |
| 10 | 2Y2 | output | Decoder 2 output Y2, active low, driving ±4 mA at 5 V. |
| 11 | 2Y1 | output | Decoder 2 output Y1, active low, driving ±4 mA at 5 V. |
| 12 | 2Y0 | output | Decoder 2 output Y0, active low, driving ±4 mA at 5 V. |
| 13 | 2B | input | Select input B (MSB) for decoder 2, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 14 | 2A | input | Select input A (LSB) for decoder 2, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 15 | 2G | input | Active-low enable input for decoder 2; can be used as a data line in demultiplexing applications. |
| 16 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended, with a 0.1-µF bypass capacitor placed close to the pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC | 4 | |
| Continuous output current | IO | -25 | 25 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -50 | 50 | mA | 4 | |||
| Junction temperature | TJ | 150 | ℃ | 4 | |||
| Storage temperature range | Tstg | -65 | 150 | ℃ | 4 | ||
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 4 | |
| High-level input voltage | VIH | 2 | V | VCC = 4.5 V to 5.5 V | 4 | ||
| Low-level input voltage | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V | 4 | ||
| Input voltage | VI | 0 | V | 4 | |||
| Output voltage | VO | 0 | V | 4 | |||
| Input transition (rise and fall) time | tt | 500 | ns | 4 | |||
| Operating free-air temperature (SN74HCT139) | TA | -40 | 85 | °C | 4 | ||
| High level output voltage | VOH | 4.4 | 4.499 | V | VI = VIH or VIL, IOH = −20 µA, VCC = 4.5 V; typ at TA = 25°C | 5 | |
| High level output voltage | VOH | 3.84 | 4.3 | V | VI = VIH or VIL, IOH = −4 mA, VCC = 4.5 V; typ at TA = 25°C | 5 | |
| Low level output voltage | VOL | 0.001 | 0.1 | V | VI = VIH or VIL, IOL = 20 µA; typ at TA = 25°C | 5 | |
| Low level output voltage | VOL | 0.17 | 0.33 | V | VI = VIH or VIL, IOL = 4 mA; typ at TA = 25°C | 5 | |
| Input leakage current | II | -1000 | 0.1 | 1000 | nA | VI = VCC or 0, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Supply current | ICC | 8 | 80 | µA | VI = VCC or 0, IO = 0, VCC = 5.5 V; typ at TA = 25°C | 5 | |
| Supply current change | ΔICC | 1.4 | 2.9 | mA | One input at 0.5 V or 2.4 V, other inputs at 0 or VCC, VCC = 5.5 V; typ at TA = 25°C | 5 | |
| Input capacitance | Ci | 3 | 10 | pF | VCC = 4.5 V to 5.5 V; typ at TA = 25°C | 5 | |
| Propagation delay A or B to Y | tpd | 14 | 43 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 | |
| Propagation delay A or B to Y | tpd | 12 | 40 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 | |
| Propagation delay G to Y | tpd | 11 | 43 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 | |
| Propagation delay G to Y | tpd | 10 | 40 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 | |
| Output transition time Y | tt | 8 | 19 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 | |
| Output transition time Y | tt | 6 | 17 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 | |
| Package thermal impedance | RθJA | 73 | °C/W | D (SOIC) package, 16 pins | 4 |
CAD (KiCad official)
- Symbol:
SN74HCT139DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74hct139dr-etched.step/sn74hct139dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hct139dr.step/sn74hct139dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
2008a255df648fb6, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HCT139DR
**Texas Instruments** · Logic ICs · SOIC-16
SN74HCT139DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1G | input | Active-low enable input for decoder 1; can be used as a data line in demultiplexing applications. |
| 2 | 1A | input | Select input A (LSB) for decoder 1, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 3 | 1B | input | Select input B (MSB) for decoder 1, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 4 | 1Y0 | output | Decoder 1 output Y0, active low, driving ±4 mA at 5 V. |
| 5 | 1Y1 | output | Decoder 1 output Y1, active low, driving ±4 mA at 5 V. |
| 6 | 1Y2 | output | Decoder 1 output Y2, active low, driving ±4 mA at 5 V. |
| 7 | 1Y3 | output | Decoder 1 output Y3, active low, driving ±4 mA at 5 V. |
| 8 | GND | power_in | Ground pin. |
| 9 | 2Y3 | output | Decoder 2 output Y3, active low, driving ±4 mA at 5 V. |
| 10 | 2Y2 | output | Decoder 2 output Y2, active low, driving ±4 mA at 5 V. |
| 11 | 2Y1 | output | Decoder 2 output Y1, active low, driving ±4 mA at 5 V. |
| 12 | 2Y0 | output | Decoder 2 output Y0, active low, driving ±4 mA at 5 V. |
| 13 | 2B | input | Select input B (MSB) for decoder 2, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 14 | 2A | input | Select input A (LSB) for decoder 2, TTL-compatible with VIH min 2 V and VIL max 0.8 V. |
| 15 | 2G | input | Active-low enable input for decoder 2; can be used as a data line in demultiplexing applications. |
| 16 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended, with a 0.1-µF bypass capacitor placed close to the pin. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic ICs |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage range | VCC | -0.5 | | 7 | V | | 4 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < 0 or VI > VCC | 4 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < 0 or VO > VCC | 4 |
| Continuous output current | IO | -25 | | 25 | mA | VO = 0 to VCC | 4 |
| Continuous current through VCC or GND | | -50 | | 50 | mA | | 4 |
| Junction temperature | TJ | | | 150 | ℃ | | 4 |
| Storage temperature range | Tstg | -65 | | 150 | ℃ | | 4 |
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | | 4 |
| High-level input voltage | VIH | 2 | | | V | VCC = 4.5 V to 5.5 V | 4 |
| Low-level input voltage | VIL | | | 0.8 | V | VCC = 4.5 V to 5.5 V | 4 |
| Input voltage | VI | 0 | | | V | | 4 |
| Output voltage | VO | 0 | | | V | | 4 |
| Input transition (rise and fall) time | tt | | | 500 | ns | | 4 |
| Operating free-air temperature (SN74HCT139) | TA | -40 | | 85 | °C | | 4 |
| High level output voltage | VOH | 4.4 | 4.499 | | V | VI = VIH or VIL, IOH = −20 µA, VCC = 4.5 V; typ at TA = 25°C | 5 |
| High level output voltage | VOH | 3.84 | 4.3 | | V | VI = VIH or VIL, IOH = −4 mA, VCC = 4.5 V; typ at TA = 25°C | 5 |
| Low level output voltage | VOL | | 0.001 | 0.1 | V | VI = VIH or VIL, IOL = 20 µA; typ at TA = 25°C | 5 |
| Low level output voltage | VOL | | 0.17 | 0.33 | V | VI = VIH or VIL, IOL = 4 mA; typ at TA = 25°C | 5 |
| Input leakage current | II | -1000 | 0.1 | 1000 | nA | VI = VCC or 0, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Supply current | ICC | | 8 | 80 | µA | VI = VCC or 0, IO = 0, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Supply current change | ΔICC | | 1.4 | 2.9 | mA | One input at 0.5 V or 2.4 V, other inputs at 0 or VCC, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Input capacitance | Ci | | 3 | 10 | pF | VCC = 4.5 V to 5.5 V; typ at TA = 25°C | 5 |
| Propagation delay A or B to Y | tpd | | 14 | 43 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 |
| Propagation delay A or B to Y | tpd | | 12 | 40 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Propagation delay G to Y | tpd | | 11 | 43 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 |
| Propagation delay G to Y | tpd | | 10 | 40 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Output transition time Y | tt | | 8 | 19 | ns | CL = 50 pF, VCC = 4.5 V; typ at TA = 25°C | 5 |
| Output transition time Y | tt | | 6 | 17 | ns | CL = 50 pF, VCC = 5.5 V; typ at TA = 25°C | 5 |
| Package thermal impedance | RθJA | | 73 | | °C/W | D (SOIC) package, 16 pins | 4 |
## CAD (KiCad official)
- Symbol: `SN74HCT139DR`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files: `sn74hct139dr-etched.step` / `sn74hct139dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hct139dr.step` / `sn74hct139dr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hct139.pdf) (23 pp, sha256 `2008a255df648fb6`, retrieved 2026-10-18, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hct139dr-datasheet.pdf)