component
SN74HCS72QDRQ1
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HCS72QDRQ1
Texas Instruments · Flip Flops · SOIC-14
SN74HCS72QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Clear input for channel 1, active low; asynchronous reset that drives output Q low. |
| 2 | 1D | input | Data input for channel 1; sampled on the falling edge of the clock when setup and hold time requirements are met. |
| 3 | 1CLK | input | Clock input for channel 1, falling edge triggered; maximum frequency ranges from 20 to 105 MHz depending on supply voltage 2V to 6V. |
| 4 | 1PRE | input | Preset input for channel 1, active low; asynchronous set that drives output Q high. |
| 5 | 1Q | output | Non-inverted output for channel 1; can source or sink ±7.8 mA at 6V supply with high level voltage of 5.4 to 5.75 V. |
| 6 | 1Q̅ | output | Inverted output for channel 1; can source or sink ±7.8 mA at 6V supply with low level voltage of 0.22 to 0.33 V. |
| 7 | GND | power_in | Ground reference; 0V potential connection providing return path for all device currents. |
| 8 | 2Q̅ | output | Inverted output for channel 2; can source or sink ±7.8 mA at 6V supply with low level voltage of 0.22 to 0.33 V. |
| 9 | 2Q | output | Non-inverted output for channel 2; can source or sink ±7.8 mA at 6V supply with high level voltage of 5.4 to 5.75 V. |
| 10 | 2PRE | input | Preset input for channel 2, active low; asynchronous set that drives output Q high. |
| 11 | 2CLK | input | Clock input for channel 2, falling edge triggered; maximum frequency ranges from 20 to 105 MHz depending on supply voltage 2V to 6V. |
| 12 | 2D | input | Data input for channel 2; sampled on the falling edge of the clock when setup and hold time requirements are met. |
| 13 | 2CLR | input | Clear input for channel 2, active low; asynchronous reset that drives output Q low. |
| 14 | VCC | power_in | Positive power supply; operates with supply voltage from 2V to 6V and provides power to the device. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74HCS72QDRQ1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hcs72qdrq1-etched.step/sn74hcs72qdrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hcs72qdrq1.step/sn74hcs72qdrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (23 pp, sha256
aee10dd180539d59, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).