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SN74HCS594QPWRQ1

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Texas Instruments Shifting Register, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Datasheet

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Contents

README

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SN74HCS594QPWRQ1

Texas Instruments · Shifting Register · TSSOP-16

SN74HCS594QPWRQ1 from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 QB output QB output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
2 QC output QC output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
3 QD output QD output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
4 QE output QE output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
5 QF output QF output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
6 QG output QG output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
7 QH output QH output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
8 GND power_in Ground pin; continuous current through GND is limited to ±70mA.
9 QH' output Serial output from the shift register, used for cascading to the SER input of the next device.
10 SRCLR input Shift register clear, active low (Schmitt-trigger input); must be tied to VCC or GND if unused.
11 SRCLK input Shift register clock, rising-edge triggered (Schmitt-trigger input).
12 RCLK input Output (storage) register clock, rising-edge triggered (Schmitt-trigger input).
13 RCLR input Storage (output) register clear, active low (Schmitt-trigger input); must be tied to VCC or GND if unused.
14 SER input Serial data input to the shift register (Schmitt-trigger input).
15 QA output QA output of the output register (balanced CMOS push-pull, ±7.8mA at 6V); leave floating if unused.
16 VCC power_in Positive supply, 2V to 6V recommended (absolute max 7V); place a 0.1µF bypass capacitor close to the pin.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Positive switching threshold VT+ 0.7 1.5 V VCC = 2V 5
Positive switching threshold VT+ 1.7 3.15 V VCC = 4.5V 5
Positive switching threshold VT+ 2.1 4.2 V VCC = 6V 5
Negative switching threshold VT- 0.3 1 V VCC = 2V 5
Negative switching threshold VT- 0.9 2.2 V VCC = 4.5V 5
Negative switching threshold VT- 1.2 3 V VCC = 6V 5
Hysteresis (VT+ - VT-) ΔVT 0.2 1 V VCC = 2V 5
Hysteresis (VT+ - VT-) ΔVT 0.4 1.4 V VCC = 4.5V 5
Hysteresis (VT+ - VT-) ΔVT 0.6 1.6 V VCC = 6V 5
High-level output voltage VOH 4 4.3 V VI = VIH or VIL, IOH = -6mA, VCC = 4.5V 5
High-level output voltage VOH 5.4 5.75 V VI = VIH or VIL, IOH = -7.8mA, VCC = 6V 5
Low-level output voltage VOL 0.002 0.1 V VI = VIH or VIL, IOL = 20µA, VCC = 2V to 6V 5
Low-level output voltage VOL 0.18 0.3 V VI = VIH or VIL, IOL = 6mA, VCC = 4.5V 5
Low-level output voltage VOL 0.22 0.33 V VI = VIH or VIL, IOL = 7.8mA, VCC = 6V 5
Input leakage current II -1000 100 1000 nA VI = VCC or 0, VCC = 6V 5
Supply current ICC 0.1 2 µA VI = VCC or 0, IO = 0, VCC = 6V 5
Input capacitance Ci 5 pF VCC = 2V to 6V 5
Power dissipation capacitance per gate Cpd 40 pF No load, VCC = 2V to 6V 7
Supply voltage VCC 2 5 6 V 4
Input voltage VI 0 V max = VCC 4
Output voltage VO 0 V max = VCC 4
Ambient temperature TA -40 125 °C 4
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5V or VI > VCC + 0.5V 4
Output clamp current IOK -20 20 mA VI < -0.5V or VI > VCC + 0.5V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
ESD HBM V(ESD) -4000 4000 V HBM, AEC Q100-002 4
ESD CDM V(ESD) -1500 1500 V CDM, AEC Q100-011 4
Junction-to-ambient thermal resistance RθJA 141.2 °C/W PW (TSSOP) 16 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 78.8 °C/W PW (TSSOP) 16 pins 5
Junction-to-board thermal resistance RθJB 85.8 °C/W PW (TSSOP) 16 pins 5
Maximum switching frequency fmax 17 MHz VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Maximum switching frequency fmax 54 MHz VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Maximum switching frequency fmax 68 MHz VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7
Pulse duration, SRCLK or RCLK high or low tw 12 ns VCC = 2V, TA = -40°C to 125°C 6
Pulse duration, SRCLK or RCLK high or low tw 7 ns VCC = 4.5V, TA = -40°C to 125°C 6
Pulse duration, SRCLR or RCLR low tw 12 ns VCC = 2V, TA = -40°C to 125°C 6
Pulse duration, SRCLR or RCLR low tw 7 ns VCC = 4.5V, TA = -40°C to 125°C 6
Propagation delay, SRCLK to QH' tpd 19 45 ns VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, SRCLK to QH' tpd 7 17 ns VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, SRCLK to QH' tpd 6 12 ns VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLK to QA-QH tpd 19 45 ns VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLK to QA-QH tpd 7 17 ns VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLK to QA-QH tpd 6 12 ns VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, SRCLR to QH' tPHL 18 55 ns VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, SRCLR to QH' tPHL 7 17 ns VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, SRCLR to QH' tPHL 6 15 ns VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLR to QA-QH tPHL 18 55 ns VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLR to QA-QH tPHL 7 17 ns VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Propagation delay, RCLR to QA-QH tPHL 6 15 ns VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7
Transition time, any output tt 16 ns VCC = 2V, CL = 50pF, TA = -40°C to 125°C 7
Transition time, any output tt 9 ns VCC = 4.5V, CL = 50pF, TA = -40°C to 125°C 7
Transition time, any output tt 8 ns VCC = 6V, CL = 50pF, TA = -40°C to 125°C 7

CAD (KiCad official)

  • Symbol: SN74HCS594QPWRQ1
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs594qpwrq1-etched.step / sn74hcs594qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs594qpwrq1.step / sn74hcs594qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (36 pp, sha256 90d5d2443e5ce885, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF