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SN74HCS4075QDRQ1

Texas Instruments · Logic Gates · SOIC-14

SN74HCS4075QDRQ1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	2A	input	Channel 2 input A of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
2	2B	input	Channel 2 input B of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
3	1A	input	Channel 1 input A of the 3-input OR gate; the input is Schmitt-trigger, and unused inputs must be tied to VCC or GND.
4	1B	input	Channel 1 input B of the 3-input OR gate; the input is Schmitt-trigger, and unused inputs must be tied to VCC or GND.
5	1C	input	Channel 1 input C of the 3-input OR gate; the input is Schmitt-trigger, and unused inputs must be tied to VCC or GND.
6	1Y	output	Channel 1 output Y of the 3-input OR gate, a balanced CMOS push-pull output driving Y = A + B + C.
7	GND	power_in	Ground reference for the device.
8	2C	input	Channel 2 input C of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
9	2Y	output	Channel 2 output Y of the 3-input OR gate, a balanced CMOS push-pull output driving Y = A + B + C.
10	3Y	output	Channel 3 output Y of the 3-input OR gate, a balanced CMOS push-pull output driving Y = A + B + C.
11	3A	input	Channel 3 input A of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
12	3B	input	Channel 3 input B of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
13	3C	input	Channel 3 input C of the 3-input OR gate; the gate performs Y = A + B + C in positive logic.
14	VCC	power_in	Positive supply; the datasheet recommends 2 V to 6 V (absolute maximum 7 V) with a 0.1 µF bypass capacitor close to the pin.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-14
Category	Logic
Pins	14

CAD (KiCad official)

Symbol: SN74HCS4075QDRQ1
Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
3D model: SOIC-14 (KiCad packages3D, STEP)
3D model files: sn74hcs4075qdrq1-etched.step / sn74hcs4075qdrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs4075qdrq1.step / sn74hcs4075qdrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (25 pp, sha256 d5fb59118febe6b9, retrieved 2026-10-08, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF