component

SN74HCS32QPWRQ1

Public Made by Adom

by adom

Texas Instruments Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic icssn74hcs32qpwrq1factory-2.0.0extractor-text

Verified SN74HCS32QPWRQ1

by Ray · last 31 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

31 Oct 2026RayPublished by the parts factory: tier mfr, 14 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: SN74HCS32QPWRQ1 · TSSOP-14 · 14 pins
  • ✓copper: 14 copper pads, none touching another net
  • ✓datasheet: all 14 pin names found in the 31-page datasheet
  • ✓distributor: lcsc C2872372, digikey 296-SN74HCS32QPWRQ1TR-ND, mouser 595-SN74HCS32QPWRQ1
  • ✓family: TSSOP-14_4.4x5mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-2vj9958s/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare
  • ✓pads: 14 pins = 14 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 14 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ sn74hcs32qpwrq1.kicad_sym✓ sn74hcs32qpwrq1.kicad_mod✓ sn74hcs32qpwrq1.step
Spot something wrong? Report it as an issue Propose a fix Records are signed by members of adom.
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10h ago
viewers sn74hcs32qpwrq1: viewers · Ray 10h ago
package.json Publish 0.1.0 · Ray 10h ago
page.json Set visibility: public · Ray 10h ago
README.md Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1-etched.glb Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1-etched.step sn74hcs32qpwrq1: factory component page (tier=mfr) · Ray 10h ago
sn74hcs32qpwrq1-hero.glb sn74hcs32qpwrq1: hero GLB from the etched model (keeps the MPN mark) · Ray 10h ago
sn74hcs32qpwrq1-hero.overlay.json Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1.glb Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1.kicad_mod Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1.kicad_sym Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1.lbr Publish 0.1.0 · Ray 10h ago
sn74hcs32qpwrq1.step Publish 0.1.0 · Ray 10h ago
verification.json Verified: Published by the parts factory: tier mfr, 14 pins · Ray 10h ago

SN74HCS32QPWRQ1

Texas Instruments · Gates · TSSOP-14

SN74HCS32QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of gate 1 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
2 1B input Input B of gate 1 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
3 1Y output Balanced CMOS push-pull output of gate 1 (Y = A + B); unused outputs should be left disconnected.
4 2A input Input A of gate 2 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
5 2B input Input B of gate 2 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
6 2Y output Balanced CMOS push-pull output of gate 2 (Y = A + B); unused outputs should be left disconnected.
7 GND power_in Ground reference for the device; the recommended bypass capacitor of 0.1 µF is placed between VCC and GND.
8 3Y output Balanced CMOS push-pull output of gate 3 (Y = A + B); unused outputs should be left disconnected.
9 3A input Input A of gate 3 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
10 3B input Input B of gate 3 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
11 4Y output Balanced CMOS push-pull output of gate 4 (Y = A + B); unused outputs should be left disconnected.
12 4A input Input A of gate 4 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
13 4B input Input B of gate 4 (Y = A + B), a Schmitt-trigger input whose unused inputs must be tied to VCC or GND.
14 VCC power_in Positive supply, specified from 2 V to 6 V with absolute maximum of -0.5 V to 7 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Positive switching threshold, VCC = 2 V VT+ 0.7 1.5 V 5
Positive switching threshold, VCC = 4.5 V VT+ 1.7 3.15 V 5
Positive switching threshold, VCC = 6 V VT+ 2.1 4.2 V 5
Negative switching threshold, VCC = 2 V VT- 0.3 1 V 5
Negative switching threshold, VCC = 4.5 V VT- 0.9 2.2 V 5
Negative switching threshold, VCC = 6 V VT- 1.2 3 V 5
Hysteresis (VT+ - VT-), VCC = 2 V ΔVT 0.2 1 V 5
Hysteresis (VT+ - VT-), VCC = 4.5 V ΔVT 0.4 1.4 V 5
Hysteresis (VT+ - VT-), VCC = 6 V ΔVT 0.6 1.6 V 5
High-level output voltage, VCC = 4.5 V VOH 4 4.3 V VI = VIH or VIL, IOH = -6 mA 5
High-level output voltage, VCC = 6 V VOH 5.4 5.75 V VI = VIH or VIL, IOH = -7.8 mA 5
Low-level output voltage, VCC = 2 V to 6 V VOL 0.002 0.1 V VI = VIH or VIL, IOL = 20 µA 5
Low-level output voltage, VCC = 4.5 V VOL 0.18 0.3 V VI = VIH or VIL, IOL = 6 mA 5
Low-level output voltage, VCC = 6 V VOL 0.22 0.33 V VI = VIH or VIL, IOL = 7.8 mA 5
Input leakage current, VCC = 6 V II -1000 100 1000 nA VI = VCC or 0 5
Supply current, VCC = 6 V ICC 0.1 2 µA VI = VCC or 0, IO = 0 5
Propagation delay A or B to Y, VCC = 2 V tpd 15 36 ns CL = 50 pF 6
Propagation delay A or B to Y, VCC = 4.5 V tpd 7 13 ns CL = 50 pF 6
Propagation delay A or B to Y, VCC = 6 V tpd 6 12 ns CL = 50 pF 6
Transition time Y, VCC = 2 V tt 9 16 ns CL = 50 pF 6
Transition time Y, VCC = 4.5 V tt 5 9 ns CL = 50 pF 6
Transition time Y, VCC = 6 V tt 4 8 ns CL = 50 pF 6
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 2 5 6 V 4
Input voltage VI 0 V 4
Output voltage VO 0 V 4
Ambient temperature TA -40 125 °C 4
Junction-to-ambient thermal resistance, PW (TSSOP) 14 pins RθJA 151.7 °C/W 5
Junction-to-case (top) thermal resistance, PW (TSSOP) 14 pins RθJC(top) 79.4 °C/W 5
Junction-to-board thermal resistance, PW (TSSOP) 14 pins RθJB 94.7 °C/W 5
Junction-to-top characterization parameter, PW (TSSOP) 14 pins ΨJT 25.2 °C/W 5
Junction-to-board characterization parameter, PW (TSSOP) 14 pins ΨJB 94.1 °C/W 5

CAD (KiCad official)

  • Symbol: SN74HCS32QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs32qpwrq1-etched.step / sn74hcs32qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs32qpwrq1.step / sn74hcs32qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 ed409c953c24b904, retrieved 2026-10-31, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF