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Generated by kicad-footprint-generator · KiCad file format 20260206

Name	Last commit message	Last updated
docs	sn74hcs27pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
viewers	sn74hcs27pwr: viewers · Ray	11d ago
package.json	Publish 0.1.0 · Ray	11d ago
page.json	Set visibility: public · Ray	11d ago
README.md	Initial commit: component/sn74hcs27pwr · Ray	11d ago
sn74hcs27pwr-etched.fit.json	sn74hcs27pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74hcs27pwr-etched.glb	sn74hcs27pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74hcs27pwr-etched.step	sn74hcs27pwr: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray	2d ago
sn74hcs27pwr.glb	Publish 0.1.0 · Ray	11d ago
sn74hcs27pwr.kicad_mod	Publish 0.1.0 · Ray	11d ago
sn74hcs27pwr.kicad_sym	Publish 0.1.0 · Ray	11d ago
sn74hcs27pwr.lbr	Publish 0.1.0 · Ray	11d ago
sn74hcs27pwr.step	Publish 0.1.0 · Ray	11d ago

SN74HCS27PWR

Texas Instruments · Logic Gates · TSSOP-14

SN74HCS27PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	1A	input	Schmitt-trigger input A for channel 1 of triple 3-input NOR gate, logic input range 0 V to VCC
2	1B	input	Schmitt-trigger input B for channel 1 of triple 3-input NOR gate, logic input range 0 V to VCC
3	2A	input	Schmitt-trigger input A for channel 2 of triple 3-input NOR gate, logic input range 0 V to VCC
4	2B	input	Schmitt-trigger input B for channel 2 of triple 3-input NOR gate, logic input range 0 V to VCC
5	2C	input	Schmitt-trigger input C for channel 2 of triple 3-input NOR gate, logic input range 0 V to VCC
6	2Y	output	Output Y for channel 2 NOR gate, capable of sourcing/sinking 7.8 mA with VOL ≤ 0.33 V and VOH ≥ 5.4 V at 6 V
7	GND	power_in	Ground, supply return reference voltage
8	3Y	output	Output Y for channel 3 NOR gate, capable of sourcing/sinking 7.8 mA with VOL ≤ 0.33 V and VOH ≥ 5.4 V at 6 V
9	3A	input	Schmitt-trigger input A for channel 3 of triple 3-input NOR gate, logic input range 0 V to VCC
10	3B	input	Schmitt-trigger input B for channel 3 of triple 3-input NOR gate, logic input range 0 V to VCC
11	3C	input	Schmitt-trigger input C for channel 3 of triple 3-input NOR gate, logic input range 0 V to VCC
12	1Y	output	Output Y for channel 1 NOR gate, capable of sourcing/sinking 7.8 mA with VOL ≤ 0.33 V and VOH ≥ 5.4 V at 6 V
13	1C	input	Schmitt-trigger input C for channel 1 of triple 3-input NOR gate, logic input range 0 V to VCC
14	VCC	power_in	Positive supply voltage, operating range 2 V to 6 V

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TSSOP-14
Category	Logic
Pins	14

CAD (KiCad official)

Symbol: SN74HCS27PWR
Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
3D model: TSSOP-14 (KiCad packages3D, STEP)
3D model files: sn74hcs27pwr-etched.step / sn74hcs27pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs27pwr.step / sn74hcs27pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (25 pp, sha256 b01d988783bf2ba0, retrieved 2026-09-24, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF