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SN74HCS264PWR

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Texas Instruments Shift Registers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HCS264PWR

Texas Instruments · Shift Registers · TSSOP-14

SN74HCS264PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A input Serial input A, one of the AND-gated serial data inputs (A ● B) that is stored in the first register on the low-to-high CLK transition.
2 B input Serial input B, one of the AND-gated serial data inputs (A ● B) that is stored in the first register on the low-to-high CLK transition.
3 QA output Parallel output A, the inverted output of the data stored in register A.
4 QB output Parallel output B, the inverted output of the data stored in register B.
5 QC output Parallel output C, the inverted output of the data stored in register C.
6 QD output Parallel output D, the inverted output of the data stored in register D.
7 GND power_in Ground reference for the device.
8 CLK input Clock input, rising edge triggered; Schmitt-trigger input with clocking on the low-to-high-level transition of CLK.
9 CLR input Active-low asynchronous clear input.
10 QE output Parallel output E, the inverted output of the data stored in register E.
11 QF output Parallel output F, the inverted output of the data stored in register F.
12 QG output Parallel output G, the inverted output of the data stored in register G.
13 QH output Parallel output H, the inverted output of the data stored in register H.
14 VCC power_in Positive supply; recommended operating supply voltage range is 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Electrostatic discharge, human-body model V(ESD) -4000 4000 V HBM per ANSI/ESDA/JEDEC JS-001 4
Electrostatic discharge, charged-device model V(ESD) -1500 1500 V CDM per JEDEC JESD22-C101 4
Supply voltage VCC 2 5 6 V 4
Input voltage VI 0 V Maximum is VCC 4
Output voltage VO 0 V Maximum is VCC 4
Ambient temperature TA -40 125 °C Operating free-air temperature range 4
Positive switching threshold VT+ 0.7 1.5 V VCC = 2 V 5
Positive switching threshold VT+ 1.7 3.15 V VCC = 4.5 V 5
Positive switching threshold VT+ 2.1 4.2 V VCC = 6 V 5
Negative switching threshold VT- 0.3 1 V VCC = 2 V 5
Negative switching threshold VT- 0.9 2.2 V VCC = 4.5 V 5
Negative switching threshold VT- 1.2 3 V VCC = 6 V 5
Hysteresis (VT+ - VT-) ΔVT 0.2 1 V VCC = 2 V; guaranteed by design 5
Hysteresis (VT+ - VT-) ΔVT 0.4 1.4 V VCC = 4.5 V; guaranteed by design 5
Hysteresis (VT+ - VT-) ΔVT 0.6 1.6 V VCC = 6 V; guaranteed by design 5
High-level output voltage VOH 4 4.3 V IOH = -6 mA, VCC = 4.5 V 5
High-level output voltage VOH 5.4 5.75 V IOH = -7.8 mA, VCC = 6 V 5
Low-level output voltage VOL 0.002 0.1 V IOL = 20 µA, VCC 2 V to 6 V 5
Low-level output voltage VOL 0.18 0.3 V IOL = 6 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.22 0.33 V IOL = 7.8 mA, VCC = 6 V 5
Input leakage current II -1000 1000 nA VI = VCC or 0, VCC = 6 V 5
Supply current ICC 0.1 2 µA VI = VCC or 0, IO = 0, VCC = 6 V 5
Junction-to-ambient thermal resistance (PW TSSOP) RθJA 141.2 °C/W PW (TSSOP) 16 pins 4
Junction-to-case (top) thermal resistance (PW TSSOP) RθJC(top) 78.8 °C/W PW (TSSOP) 16 pins 4
Junction-to-board thermal resistance (PW TSSOP) RθJB 85.8 °C/W PW (TSSOP) 16 pins 4
Junction-to-top characterization parameter (PW TSSOP) ΨJT 27.7 °C/W PW (TSSOP) 16 pins 4
Junction-to-board characterization parameter (PW TSSOP) ΨJB 85.5 °C/W PW (TSSOP) 16 pins 4
Input capacitance Ci 5 pF VCC 2 V to 6 V 5

CAD (KiCad official)

  • Symbol: SN74HCS264PWR
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs264pwr-etched.step / sn74hcs264pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs264pwr.step / sn74hcs264pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (27 pp, sha256 ca9efb6839517587, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF