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SN74HCS259PWR
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Texas Instruments Latches, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HCS259PWR
Texas Instruments · Latches · TSSOP-16
SN74HCS259PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S0 | input | Address select 0 input, one of three address inputs that choose which of the eight addressable latches is selected. |
| 2 | S1 | input | Address select 1 input, one of three address inputs that choose which of the eight addressable latches is selected. |
| 3 | S2 | input | Address select 2 input, one of three address inputs that choose which of the eight addressable latches is selected. |
| 4 | Q0 | output | Output 0 of the addressable latch array, active-high. |
| 5 | Q1 | output | Output 1 of the addressable latch array, active-high. |
| 6 | Q2 | output | Output 2 of the addressable latch array, active-high. |
| 7 | Q3 | output | Output 3 of the addressable latch array, active-high. |
| 8 | GND | power_in | Ground reference for the device. |
| 9 | Q4 | output | Output 4 of the addressable latch array, active-high. |
| 10 | Q5 | output | Output 5 of the addressable latch array, active-high. |
| 11 | Q6 | output | Output 6 of the addressable latch array, active-high. |
| 12 | Q7 | output | Output 7 of the addressable latch array, active-high. |
| 13 | D | input | Data input written into the addressed latch. |
| 14 | G | input | Enable input, active low. |
| 15 | CLR | input | Clear input, active low, which clears the latches. |
| 16 | VCC | power_in | Positive supply; the datasheet gives a recommended supply range of 2 V to 6 V (absolute maximum 7 V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| Input voltage | VI | 0 | V | 4 | |||
| Output voltage | VO | 0 | V | 4 | |||
| Ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Positive switching threshold | VT+ | 0.7 | 1.5 | V | VCC = 2 V | 5 | |
| Positive switching threshold | VT+ | 1.7 | 3.15 | V | VCC = 4.5 V | 5 | |
| Positive switching threshold | VT+ | 2.1 | 4.2 | V | VCC = 6 V | 5 | |
| Negative switching threshold | VT- | 0.3 | 1 | V | VCC = 2 V | 5 | |
| Negative switching threshold | VT- | 0.9 | 2.2 | V | VCC = 4.5 V | 5 | |
| Negative switching threshold | VT- | 1.2 | 3 | V | VCC = 6 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.2 | 1 | V | VCC = 2 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | 1.4 | V | VCC = 4.5 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.6 | 1.6 | V | VCC = 6 V | 5 | |
| High-level output voltage | VOH | 4 | 4.3 | V | VI = VIH or VIL; IOH = -6 mA; VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.4 | 5.75 | V | VI = VIH or VIL; IOH = -7.8 mA; VCC = 6 V | 5 | |
| Low-level output voltage | VOL | 0.002 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V to 6 V | 5 | |
| Low-level output voltage | VOL | 0.18 | 0.3 | V | VI = VIH or VIL; IOL = 6 mA; VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.22 | 0.33 | V | VI = VIH or VIL; IOL = 7.8 mA; VCC = 6 V | 5 | |
| Input leakage current | II | -1000 | 100 | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 |
| Supply current | ICC | 0.1 | 2 | µA | VI = VCC or 0; IO = 0; VCC = 6 V | 5 | |
| Pulse duration CLR low | tw | 5 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 5 | ||
| Pulse duration G low | tw | 5 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 5 | ||
| Setup time data or address before G↑ | tsu | 8 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 5 | ||
| Setup time data or address before G↑ | tsu | 4 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 5 | ||
| Hold time data or address after G↑ | th | 5 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 5 | ||
| Propagation delay data to any Q | tpd | 48 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 6 | ||
| Propagation delay data to any Q | tpd | 18 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 6 | ||
| Propagation delay data to any Q | tpd | 15 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 6 V | 6 | ||
| Propagation delay address to any Q | tpd | 52 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 6 | ||
| Propagation delay address to any Q | tpd | 20 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 6 | ||
| Propagation delay address to any Q | tpd | 18 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 6 V | 6 | ||
| Propagation delay G to any Q | tpd | 55 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 6 | ||
| Propagation delay G to any Q | tpd | 24 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 6 | ||
| Propagation delay G to any Q | tpd | 21 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 6 V | 6 | ||
| Propagation delay CLR to any Q | tPHL | 51 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 6 | ||
| Propagation delay CLR to any Q | tPHL | 20 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 6 | ||
| Propagation delay CLR to any Q | tPHL | 16 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 6 V | 6 | ||
| Transition time any output | tt | 17 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 2 V | 6 | ||
| Transition time any output | tt | 8 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 4.5 V | 6 | ||
| Transition time any output | tt | 7 | ns | CL = 50 pF; TA = -40°C to 125°C; VCC = 6 V | 6 | ||
| Junction-to-ambient thermal resistance (PW) | RθJA | 141.2 | °C/W | 4 | |||
| Junction-to-case (top) thermal resistance (PW) | RθJC(top) | 78.8 | °C/W | 4 | |||
| Junction-to-board thermal resistance (PW) | RθJB | 85.8 | °C/W | 4 | |||
| Junction-to-top characterization parameter (PW) | ΨJT | 27.7 | °C/W | 4 | |||
| Junction-to-board characterization parameter (PW) | ΨJB | 85.5 | °C/W | 4 |
CAD (KiCad official)
- Symbol:
SN74HCS259PWR - Footprint:
Package_SO:TSSOP-16_4.4x5mm_P0.65mm - 3D model: TSSOP-16 (KiCad packages3D, STEP)
- 3D model files:
sn74hcs259pwr-etched.step/sn74hcs259pwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hcs259pwr.step/sn74hcs259pwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (26 pp, sha256
0b9e33d0c76b107f, retrieved 2026-10-18, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).