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SN74HCS238BQBR
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Texas Instruments Logic ICs, DHVQFN-16-EP(2.5x3.5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HCS238BQBR
Texas Instruments · Logic ICs · DHVQFN-16-EP(2.5x3.5)
SN74HCS238BQBR from Texas Instruments, in a DHVQFN-16-EP(2.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address select 0 input for the 3-to-8 line decoder. |
| 2 | A1 | input | Address select 1 input for the 3-to-8 line decoder. |
| 3 | A2 | input | Address select 2 input for the 3-to-8 line decoder. |
| 4 | G0 | input | Strobe input, active low; when enabled with G1 low and G2 high, the selected output goes high. |
| 5 | G1 | input | Strobe input, active low; all outputs are forced low when this strobe is active. |
| 6 | G2 | input | Strobe input, active high; all outputs are forced low when this strobe is inactive. |
| 7 | Y7 | output | Decoder output 7; high only when it is the selected output and the strobes do not disable the outputs. |
| 8 | GND | power_in | Ground reference for the device; operating supply range is 2 V to 6 V with VCC referenced to this pin. |
| 9 | Y6 | output | Decoder output 6; high only when it is the selected output and the strobes do not disable the outputs. |
| 10 | Y5 | output | Decoder output 5; high only when it is the selected output and the strobes do not disable the outputs. |
| 11 | Y4 | output | Decoder output 4; high only when it is the selected output and the strobes do not disable the outputs. |
| 12 | Y3 | output | Decoder output 3; high only when it is the selected output and the strobes do not disable the outputs. |
| 13 | Y2 | output | Decoder output 2; high only when it is the selected output and the strobes do not disable the outputs. |
| 14 | Y1 | output | Decoder output 1; high only when it is the selected output and the strobes do not disable the outputs. |
| 15 | Y0 | output | Decoder output 0; high only when it is the selected output and the strobes do not disable the outputs. |
| 16 | VCC | power_in | Positive supply; recommended supply range is 2 V to 6 V with absolute maximum of 7 V. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DHVQFN-16-EP(2.5x3.5) |
| Category | Logic ICs |
| Pins | 17 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| Input voltage | VI | 0 | V | maximum printed as VCC | 4 | ||
| Output voltage | VO | 0 | V | maximum printed as VCC | 4 | ||
| Ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance (BQB) | RθJA | 108.4 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Junction-to-case (top) thermal resistance (BQB) | RθJC(top) | 77.3 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Junction-to-board thermal resistance (BQB) | RθJB | 74.4 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Junction-to-top characterization parameter (BQB) | ΨJT | 12.6 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Junction-to-board characterization parameter (BQB) | ΨJB | 74.5 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Junction-to-case (bottom) thermal resistance (BQB) | RθJC(bot) | 54.3 | °C/W | BQB (WQFN) 16 pins | 5 | ||
| Positive switching threshold | VT+ | 0.7 | 1.5 | V | VCC = 2 V | 5 | |
| Positive switching threshold | VT+ | 1.7 | 3.15 | V | VCC = 4.5 V | 5 | |
| Positive switching threshold | VT+ | 2.1 | 4.2 | V | VCC = 6 V | 5 | |
| Negative switching threshold | VT- | 0.3 | 1 | V | VCC = 2 V | 5 | |
| Negative switching threshold | VT- | 0.9 | 2.2 | V | VCC = 4.5 V | 5 | |
| Negative switching threshold | VT- | 1.2 | 3 | V | VCC = 6 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.2 | 1 | V | VCC = 2 V; guaranteed by design | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | 1.4 | V | VCC = 4.5 V; guaranteed by design | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.6 | 1.6 | V | VCC = 6 V; guaranteed by design | 5 | |
| High-level output voltage | VOH | 4 | 4.3 | V | IOH = -6 mA; VI = VIH or VIL; VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.4 | 5.75 | V | IOH = -7.8 mA; VI = VIH or VIL; VCC = 6 V | 5 | |
| Low-level output voltage | VOL | 0.002 | 0.1 | V | IOL = 20 µA; VI = VIH or VIL; VCC 2 V to 6 V | 5 | |
| Low-level output voltage | VOL | 0.18 | 0.3 | V | IOL = 6 mA; VI = VIH or VIL; VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.22 | 0.33 | V | IOL = 7.8 mA; VI = VIH or VIL; VCC = 6 V | 5 | |
| Input leakage current | II | -1000 | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 | |
| Supply current | ICC | 0.1 | 2 | µA | VI = VCC or 0, IO = 0; VCC = 6 V | 5 | |
| Input capacitance | Ci | 5 | pF | VCC 2 V to 6 V | 5 | ||
| Power dissipation capacitance per gate | Cpd | 40 | pF | No load; VCC 2 V to 6 V | 6 |
CAD (KiCad official)
- Symbol:
SN74HCS238BQBR - Footprint:
Package_DFN_QFN:DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm - 3D model: DHVQFN-16-EP(2.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files:
sn74hcs238bqbr-etched.step/sn74hcs238bqbr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hcs238bqbr.step/sn74hcs238bqbr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (34 pp, sha256
f115e0af3113aa6e, retrieved 2026-10-17, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HCS238BQBR
**Texas Instruments** · Logic ICs · DHVQFN-16-EP(2.5x3.5)
SN74HCS238BQBR from Texas Instruments, in a DHVQFN-16-EP(2.5x3.5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address select 0 input for the 3-to-8 line decoder. |
| 2 | A1 | input | Address select 1 input for the 3-to-8 line decoder. |
| 3 | A2 | input | Address select 2 input for the 3-to-8 line decoder. |
| 4 | G0 | input | Strobe input, active low; when enabled with G1 low and G2 high, the selected output goes high. |
| 5 | G1 | input | Strobe input, active low; all outputs are forced low when this strobe is active. |
| 6 | G2 | input | Strobe input, active high; all outputs are forced low when this strobe is inactive. |
| 7 | Y7 | output | Decoder output 7; high only when it is the selected output and the strobes do not disable the outputs. |
| 8 | GND | power_in | Ground reference for the device; operating supply range is 2 V to 6 V with VCC referenced to this pin. |
| 9 | Y6 | output | Decoder output 6; high only when it is the selected output and the strobes do not disable the outputs. |
| 10 | Y5 | output | Decoder output 5; high only when it is the selected output and the strobes do not disable the outputs. |
| 11 | Y4 | output | Decoder output 4; high only when it is the selected output and the strobes do not disable the outputs. |
| 12 | Y3 | output | Decoder output 3; high only when it is the selected output and the strobes do not disable the outputs. |
| 13 | Y2 | output | Decoder output 2; high only when it is the selected output and the strobes do not disable the outputs. |
| 14 | Y1 | output | Decoder output 1; high only when it is the selected output and the strobes do not disable the outputs. |
| 15 | Y0 | output | Decoder output 0; high only when it is the selected output and the strobes do not disable the outputs. |
| 16 | VCC | power_in | Positive supply; recommended supply range is 2 V to 6 V with absolute maximum of 7 V. |
| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | DHVQFN-16-EP(2.5x3.5) |
| Category | Logic ICs |
| Pins | 17 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| Input clamp current | IIK | -20 | | 20 | mA | VI < -0.5 V or VI > VCC + 0.5 V | 4 |
| Output clamp current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 |
| Continuous output current | IO | -35 | | 35 | mA | VO = 0 to VCC | 4 |
| Continuous current through VCC or GND | | -70 | | 70 | mA | | 4 |
| Junction temperature | TJ | | | 150 | °C | | 4 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 4 |
| Supply voltage | VCC | 2 | 5 | 6 | V | | 4 |
| Input voltage | VI | 0 | | | V | maximum printed as VCC | 4 |
| Output voltage | VO | 0 | | | V | maximum printed as VCC | 4 |
| Ambient temperature | TA | -40 | | 125 | °C | | 4 |
| Junction-to-ambient thermal resistance (BQB) | RθJA | | 108.4 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Junction-to-case (top) thermal resistance (BQB) | RθJC(top) | | 77.3 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Junction-to-board thermal resistance (BQB) | RθJB | | 74.4 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Junction-to-top characterization parameter (BQB) | ΨJT | | 12.6 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Junction-to-board characterization parameter (BQB) | ΨJB | | 74.5 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Junction-to-case (bottom) thermal resistance (BQB) | RθJC(bot) | | 54.3 | | °C/W | BQB (WQFN) 16 pins | 5 |
| Positive switching threshold | VT+ | 0.7 | | 1.5 | V | VCC = 2 V | 5 |
| Positive switching threshold | VT+ | 1.7 | | 3.15 | V | VCC = 4.5 V | 5 |
| Positive switching threshold | VT+ | 2.1 | | 4.2 | V | VCC = 6 V | 5 |
| Negative switching threshold | VT- | 0.3 | | 1 | V | VCC = 2 V | 5 |
| Negative switching threshold | VT- | 0.9 | | 2.2 | V | VCC = 4.5 V | 5 |
| Negative switching threshold | VT- | 1.2 | | 3 | V | VCC = 6 V | 5 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.2 | | 1 | V | VCC = 2 V; guaranteed by design | 5 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | | 1.4 | V | VCC = 4.5 V; guaranteed by design | 5 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.6 | | 1.6 | V | VCC = 6 V; guaranteed by design | 5 |
| High-level output voltage | VOH | 4 | 4.3 | | V | IOH = -6 mA; VI = VIH or VIL; VCC = 4.5 V | 5 |
| High-level output voltage | VOH | 5.4 | 5.75 | | V | IOH = -7.8 mA; VI = VIH or VIL; VCC = 6 V | 5 |
| Low-level output voltage | VOL | | 0.002 | 0.1 | V | IOL = 20 µA; VI = VIH or VIL; VCC 2 V to 6 V | 5 |
| Low-level output voltage | VOL | | 0.18 | 0.3 | V | IOL = 6 mA; VI = VIH or VIL; VCC = 4.5 V | 5 |
| Low-level output voltage | VOL | | 0.22 | 0.33 | V | IOL = 7.8 mA; VI = VIH or VIL; VCC = 6 V | 5 |
| Input leakage current | II | -1000 | | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 |
| Supply current | ICC | | 0.1 | 2 | µA | VI = VCC or 0, IO = 0; VCC = 6 V | 5 |
| Input capacitance | Ci | | 5 | | pF | VCC 2 V to 6 V | 5 |
| Power dissipation capacitance per gate | Cpd | | 40 | | pF | No load; VCC 2 V to 6 V | 6 |
## CAD (KiCad official)
- Symbol: `SN74HCS238BQBR`
- Footprint: `Package_DFN_QFN:DHVQFN-16-1EP_2.5x3.5mm_P0.5mm_EP1x2mm`
- 3D model: DHVQFN-16-EP(2.5x3.5), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `sn74hcs238bqbr-etched.step` / `sn74hcs238bqbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hcs238bqbr.step` / `sn74hcs238bqbr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/sn74hcs238bqbr.pdf) (34 pp, sha256 `f115e0af3113aa6e`, retrieved 2026-10-17, tier: manufacturer)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hcs238bqbr-datasheet.pdf)