component
SN74HCS14QPWRQ1
Public Made by Adomby adom
Texas Instruments Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| package.json | 5d ago |
| page.json | 5d ago |
| README.md | 5d ago |
| sn74hcs14qpwrq1-etched.glb | 5d ago |
| sn74hcs14qpwrq1-etched.step | 5d ago |
| sn74hcs14qpwrq1-hero.glb | 5d ago |
| sn74hcs14qpwrq1-hero.overlay.json | 5d ago |
| sn74hcs14qpwrq1.glb | 5d ago |
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| sn74hcs14qpwrq1.step | 5d ago |
SN74HCS14QPWRQ1
Texas Instruments · Inverters · TSSOP-14
SN74HCS14QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Input A of channel 1 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 2 | 1Y | output | Output Y of channel 1 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 3 | 2A | input | Input A of channel 2 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 4 | 2Y | output | Output Y of channel 2 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 5 | 3A | input | Input A of channel 3 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 6 | 3Y | output | Output Y of channel 3 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 7 | GND | power_in | Ground reference; continuous current through VCC or GND is limited to ±70 mA as an absolute maximum rating. |
| 8 | 4Y | output | Output Y of channel 4 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 9 | 4A | input | Input A of channel 4 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 10 | 5Y | output | Output Y of channel 5 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 11 | 5A | input | Input A of channel 5 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 12 | 6Y | output | Output Y of channel 6 is a balanced CMOS push-pull output; unused outputs may be left floating and must not be connected directly to VCC or GND. |
| 13 | 6A | input | Input A of channel 6 is a Schmitt-trigger input; unused inputs must be terminated to VCC or GND and must not be left floating. |
| 14 | VCC | power_in | Positive supply; the recommended supply voltage range is 2 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < 0 or VI > VCC + 0.5 | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < 0 or VO > VCC + 0.5 | 4 | |
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 2 | 5 | 6 | V | 4 | |
| Input voltage | VI | 0 | V | maximum printed as VCC | 4 | ||
| Output voltage | VO | 0 | V | maximum printed as VCC | 4 | ||
| Ambient temperature | TA | -40 | 125 | °C | 4 | ||
| Junction-to-ambient thermal resistance | RθJA | 151.7 | °C/W | PW (TSSOP) package | 5 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 79.4 | °C/W | PW (TSSOP) package | 5 | ||
| Junction-to-board thermal resistance | RθJB | 94.7 | °C/W | PW (TSSOP) package | 5 | ||
| Junction-to-top characterization parameter | ΨJT | 25.2 | °C/W | PW (TSSOP) package | 5 | ||
| Junction-to-board characterization parameter | ΨJB | 94.1 | °C/W | PW (TSSOP) package | 5 | ||
| Positive switching threshold | VT+ | 0.7 | 1.5 | V | VCC = 2 V | 5 | |
| Positive switching threshold | VT+ | 1.7 | 3.15 | V | VCC = 4.5 V | 5 | |
| Positive switching threshold | VT+ | 2.1 | 4.2 | V | VCC = 6 V | 5 | |
| Negative switching threshold | VT- | 0.3 | 1 | V | VCC = 2 V | 5 | |
| Negative switching threshold | VT- | 0.9 | 2.2 | V | VCC = 4.5 V | 5 | |
| Negative switching threshold | VT- | 1.2 | 3 | V | VCC = 6 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.2 | 1 | V | VCC = 2 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.4 | 1.4 | V | VCC = 4.5 V | 5 | |
| Hysteresis (VT+ - VT-) | ΔVT | 0.6 | 1.6 | V | VCC = 6 V | 5 | |
| High-level output voltage | VOH | 4 | 4.3 | V | IOH = -6 mA, VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.4 | 5.75 | V | IOH = -7.8 mA, VCC = 6 V | 5 | |
| Low-level output voltage | VOL | 0.18 | 0.3 | V | IOL = 6 mA, VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.22 | 0.33 | V | IOL = 7.8 mA, VCC = 6 V | 5 | |
| Input leakage current | II | -1000 | 1000 | nA | VI = VCC or 0, VCC = 6 V | 5 | |
| Supply current | ICC | 0.1 | 2 | µA | VI = VCC or 0, IO = 0, VCC = 6 V | 5 | |
| Input capacitance | Ci | 5 | pF | VCC = 2 V to 6 V | 5 | ||
| Power dissipation capacitance per gate | CPD | 10 | pF | No load, VCC = 2 V to 6 V | 5 | ||
| Propagation delay A to Y | tpd | 15 | 40 | ns | VCC = 2 V | 6 | |
| Propagation delay A to Y | tpd | 6 | 17 | ns | VCC = 4.5 V | 6 | |
| Propagation delay A to Y | tpd | 5 | 16 | ns | VCC = 6 V | 6 | |
| Transition-time Y | tt | 9 | 17 | ns | VCC = 2 V | 6 | |
| Transition-time Y | tt | 5 | 8 | ns | VCC = 4.5 V | 6 | |
| Transition-time Y | tt | 4 | 7 | ns | VCC = 6 V | 6 |
CAD (KiCad official)
- Symbol:
SN74HCS14QPWRQ1 - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hcs14qpwrq1-etched.step/sn74hcs14qpwrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hcs14qpwrq1.step/sn74hcs14qpwrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
7cdb96cdafb5d3d9, retrieved 2026-10-17, tier: manufacturer) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).