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SN74HCS138DR

Texas Instruments · Signal Switches, Multiplexers, Decoders · SOIC-16

SN74HCS138DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Address select 0 input, one of the three binary address inputs that select which output goes low.
2 A1 input Address select 1 input, one of the three binary address inputs that select which output goes low.
3 A2 input Address select 2 input, one of the three binary address inputs that select which output goes low.
4 G0 input Strobe input, active low; when the outputs are gated by any strobe input, all outputs are forced high.
5 G1 input Strobe input, active low; when the outputs are gated by any strobe input, all outputs are forced high.
6 G2 input Strobe input (standard active-high strobe); when the outputs are gated by any strobe input, all outputs are forced high.
7 Y7 output Decoder output 7; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
8 GND power_in Ground reference pin.
9 Y6 output Decoder output 6; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
10 Y5 output Decoder output 5; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
11 Y4 output Decoder output 4; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
12 Y3 output Decoder output 3; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
13 Y2 output Decoder output 2; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
14 Y1 output Decoder output 1; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
15 Y0 output Decoder output 0; low only when it is the selected output and the outputs are not disabled by the strobe inputs, otherwise high.
16 VCC power_in Positive supply pin; recommended supply range is 2 V to 6 V (absolute maximum 7 V).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 2 5 6 V 4
Ambient temperature TA -40 125 °C 4
Input voltage VI 0 V max = VCC 4
Output voltage VO 0 V max = VCC 4
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Positive switching threshold VT+ 0.7 1.5 V VCC = 2 V 5
Positive switching threshold VT+ 1.7 3.15 V VCC = 4.5 V 5
Positive switching threshold VT+ 2.1 4.2 V VCC = 6 V 5
Negative switching threshold VT- 0.3 1 V VCC = 2 V 5
Negative switching threshold VT- 0.9 2.2 V VCC = 4.5 V 5
Negative switching threshold VT- 1.2 3 V VCC = 6 V 5
Hysteresis (VT+ - VT-) ΔVT 0.2 1 V VCC = 2 V 5
Hysteresis (VT+ - VT-) ΔVT 0.4 1.4 V VCC = 4.5 V 5
Hysteresis (VT+ - VT-) ΔVT 0.6 1.6 V VCC = 6 V 5
High-level output voltage VOH 4 4.3 V IOH = -6 mA, VCC = 4.5 V 5
High-level output voltage VOH 5.4 5.75 V IOH = -7.8 mA, VCC = 6 V 5
Low-level output voltage VOL 0.002 0.1 V IOL = 20 µA, VCC = 2 V to 6 V 5
Low-level output voltage VOL 0.18 0.3 V IOL = 6 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.22 0.33 V IOL = 7.8 mA, VCC = 6 V 5
Input leakage current II -1000 100 1000 nA VI = VCC or 0, VCC = 6 V 5
Supply current ICC 0.1 2 µA VI = VCC or 0, IO = 0, VCC = 6 V 5
Junction-to-ambient thermal resistance (D, SOIC) RθJA 122.2 °C/W D (SOIC) 16-pin package 5
Junction-to-case (top) thermal resistance (D, SOIC) RθJC(top) 80.9 °C/W D (SOIC) 16-pin package 5
Junction-to-board thermal resistance (D, SOIC) RθJB 80.6 °C/W D (SOIC) 16-pin package 5
Junction-to-top characterization parameter (D, SOIC) ΨJT 40.4 °C/W D (SOIC) 16-pin package 5
Junction-to-board characterization parameter (D, SOIC) ΨJB 80.3 °C/W D (SOIC) 16-pin package 5

CAD (KiCad official)

  • Symbol: SN74HCS138DR
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs138dr-etched.step / sn74hcs138dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs138dr.step / sn74hcs138dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 fcab8263365237de, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF