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SN74HCS02QPWRQ1

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Texas Instruments Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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SN74HCS02QPWRQ1

Texas Instruments · Logic Gates · TSSOP-14

SN74HCS02QPWRQ1 from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1Y output Output Y of channel 1, the NOR gate output (Y = A + B in positive logic).
2 1A input Input A of channel 1, a Schmitt-trigger input for slow or noisy signals.
3 1B input Input B of channel 1, a Schmitt-trigger input for slow or noisy signals.
4 2Y output Output Y of channel 2, the NOR gate output (Y = A + B in positive logic).
5 2A input Input A of channel 2, a Schmitt-trigger input for slow or noisy signals.
6 2B input Input B of channel 2, a Schmitt-trigger input for slow or noisy signals.
7 GND power_in Ground reference for the device.
8 3A input Input A of channel 3, a Schmitt-trigger input for slow or noisy signals.
9 3B input Input B of channel 3, a Schmitt-trigger input for slow or noisy signals.
10 3Y output Output Y of channel 3, the NOR gate output (Y = A + B in positive logic).
11 4A input Input A of channel 4, a Schmitt-trigger input for slow or noisy signals.
12 4B input Input B of channel 4, a Schmitt-trigger input for slow or noisy signals.
13 4Y output Output Y of channel 4, the NOR gate output (Y = A + B in positive logic).
14 VCC power_in Positive supply, specified at 2 V to 6 V in the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input clamp current IIK -20 20 mA VI < -0.5 V or VI > VCC + 0.5 V 4
Output clamp current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Continuous output current IO -35 35 mA VO = 0 to VCC 4
Continuous current through VCC or GND -70 70 mA 4
Junction temperature TJ 150 °C 4
Storage temperature Tstg -65 150 °C 4
Supply voltage VCC 2 6 V 4
Ambient temperature TA -40 125 °C 4
Positive switching threshold VT+ 0.7 1.5 V VCC = 2 V 5
Positive switching threshold VT+ 1.7 3.15 V VCC = 4.5 V 5
Positive switching threshold VT+ 2.1 4.2 V VCC = 6 V 5
Negative switching threshold VT- 0.3 1 V VCC = 2 V 5
Negative switching threshold VT- 0.9 2.2 V VCC = 4.5 V 5
Negative switching threshold VT- 1.2 3 V VCC = 6 V 5
Hysteresis (VT+ - VT-) ΔVT 0.2 1 V VCC = 2 V 5
Hysteresis (VT+ - VT-) ΔVT 0.4 1.4 V VCC = 4.5 V 5
Hysteresis (VT+ - VT-) ΔVT 0.6 1.6 V VCC = 6 V 5
High-level output voltage VOH 4 4.3 V VI = VIH or VIL, IOH = -6 mA, VCC = 4.5 V 5
High-level output voltage VOH 5.4 5.75 V VI = VIH or VIL, IOH = -7.8 mA, VCC = 6 V 5
Low-level output voltage VOL 0.18 0.3 V VI = VIH or VIL, IOL = 6 mA, VCC = 4.5 V 5
Low-level output voltage VOL 0.22 0.33 V VI = VIH or VIL, IOL = 7.8 mA, VCC = 6 V 5
Input leakage current II -1000 1000 nA VI = VCC or 0, VCC = 6 V 5
Supply current ICC 0.1 2 µA VI = VCC or 0, IO = 0, VCC = 6 V 5
Propagation delay A or B to Y tpd 16 36 ns VCC = 2 V 6
Propagation delay A or B to Y tpd 7 13 ns VCC = 4.5 V 6
Propagation delay A or B to Y tpd 6 12 ns VCC = 6 V 6
Transition time tt 7.7 13 ns VCC = 2 V 6
Transition time tt 4 6.1 ns VCC = 4.5 V 6
Transition time tt 3.5 5.1 ns VCC = 6 V 6
Input capacitance Ci 5 pF VCC = 2 V to 6 V 5
Power dissipation capacitance per gate Cpd 10 pF No load, VCC = 2 V to 6 V 5
Junction-to-ambient thermal resistance RθJA 151.7 °C/W PW (TSSOP) 14 pins 5
Junction-to-board thermal resistance RθJB 94.7 °C/W PW (TSSOP) 14 pins 5
Junction-to-case (top) thermal resistance RθJC(top) 79.4 °C/W PW (TSSOP) 14 pins 5
Junction-to-top characterization parameter ΨJT 25.2 °C/W PW (TSSOP) 14 pins 5
Junction-to-board characterization parameter ΨJB 94.1 °C/W PW (TSSOP) 14 pins 5

CAD (KiCad official)

  • Symbol: SN74HCS02QPWRQ1
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: sn74hcs02qpwrq1-etched.step / sn74hcs02qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hcs02qpwrq1.step / sn74hcs02qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (30 pp, sha256 bca631b5b33840b0, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF