component
SN74HCS02DR
Public Made by Adomby adom
Texas Instruments Logic Gates, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownSN74HCS02DR
Texas Instruments · Logic Gates · SOIC-14
SN74HCS02DR from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1Y | output | Channel 1 NOR gate output Y. |
| 2 | 1A | input | Channel 1 NOR gate input A, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 3 | 1B | input | Channel 1 NOR gate input B, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 4 | 2Y | output | Channel 2 NOR gate output Y. |
| 5 | 2A | input | Channel 2 NOR gate input A, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 6 | 2B | input | Channel 2 NOR gate input B, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 7 | GND | power_in | Ground reference for the device. |
| 8 | 3A | input | Channel 3 NOR gate input A, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 9 | 3B | input | Channel 3 NOR gate input B, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 10 | 3Y | output | Channel 3 NOR gate output Y. |
| 11 | 4A | input | Channel 4 NOR gate input A, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 12 | 4B | input | Channel 4 NOR gate input B, a Schmitt-trigger input that tolerates slow or noisy input signals. |
| 13 | 4Y | output | Channel 4 NOR gate output Y. |
| 14 | VCC | power_in | Positive supply; the datasheet's recommended VCC range is 2 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input clamp current | IIK | -20 | 20 | mA | VI < -0.5 or VI > VCC + 0.5 | 4 | |
| Output clamp current | IOK | -20 | 20 | mA | VO < -0.5 or VO > VCC + 0.5 | 4 | |
| Continuous output current | IO | -35 | 35 | mA | VO = 0 to VCC | 4 | |
| Continuous current through VCC or GND | -70 | 70 | mA | 4 | |||
| Junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 2 | 6 | V | Over operating free-air temperature range | 4 | |
| Input voltage | VI | 0 | V | Over operating free-air temperature range; max printed as VCC | 4 | ||
| Output voltage | VO | 0 | V | Over operating free-air temperature range; max printed as VCC | 4 | ||
| Ambient temperature | TA | -40 | 125 | °C | Over operating free-air temperature range | 4 | |
| Positive switching threshold | VT+ | 1.13 | 1.26 | 1.37 | V | VCC = 2 V | 4 |
| Positive switching threshold | VT+ | 2.31 | 2.47 | 2.66 | V | VCC = 4.5 V | 4 |
| Positive switching threshold | VT+ | 2.99 | 3.18 | 3.44 | V | VCC = 6 V | 4 |
| Negative switching threshold | VT- | 0.55 | 0.62 | 0.71 | V | VCC = 2 V | 4 |
| Negative switching threshold | VT- | 1.21 | 1.36 | 1.5 | V | VCC = 4.5 V | 4 |
| Negative switching threshold | VT- | 1.56 | 1.79 | 1.99 | V | VCC = 6 V | 4 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.54 | 0.64 | 0.71 | V | VCC = 2 V | 5 |
| Hysteresis (VT+ - VT-) | ΔVT | 0.94 | 1.11 | 1.27 | V | VCC = 4.5 V | 5 |
| Hysteresis (VT+ - VT-) | ΔVT | 1.2 | 1.38 | 1.57 | V | VCC = 6 V | 5 |
| High-level output voltage | VOH | 4 | 4.3 | V | VI = VIH or VIL; IOH = -6 mA; VCC = 4.5 V | 5 | |
| High-level output voltage | VOH | 5.4 | 5.75 | V | VI = VIH or VIL; IOH = -7.8 mA; VCC = 6 V | 5 | |
| Low-level output voltage | VOL | 0.002 | 0.1 | V | VI = VIH or VIL; IOL = 20 µA; VCC = 2 V to 6 V | 5 | |
| Low-level output voltage | VOL | 0.18 | 0.3 | V | VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V | 5 | |
| Low-level output voltage | VOL | 0.22 | 0.33 | V | VI = VIH or VIL; IOL = 7.8 mA; VCC = 6 V | 5 | |
| Input leakage current | II | -1000 | 100 | 1000 | nA | VI = VCC or 0; VCC = 6 V | 5 |
| Supply current | ICC | 0.1 | 2 | µA | VI = VCC or 0, IO = 0; VCC = 6 V | 5 | |
| Propagation delay | tpd | 16 | 36 | ns | From A or B to Y; VCC = 2 V | 5 | |
| Propagation delay | tpd | 7 | 13 | ns | From A or B to Y; VCC = 4.5 V | 5 | |
| Propagation delay | tpd | 6 | 12 | ns | From A or B to Y; VCC = 6 V | 5 | |
| Transition time | tt | 7.7 | 13 | ns | To Y; VCC = 2 V | 5 | |
| Transition time | tt | 4 | 6.1 | ns | To Y; VCC = 4.5 V | 5 | |
| Transition time | tt | 3.5 | 5.1 | ns | To Y; VCC = 6 V | 5 |
CAD (KiCad official)
- Symbol:
SN74HCS02DR - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- 3D model files:
sn74hcs02dr-etched.step/sn74hcs02dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hcs02dr.step/sn74hcs02dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
0cccf73423d443c1, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).