component
SN74HC74QDRG4Q1
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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SN74HC74QDRG4Q1
Texas Instruments · Flip Flops · SOIC-14
SN74HC74QDRG4Q1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Active low clear input for channel 1 flip-flop |
| 2 | 1D | input | Data input for channel 1 flip-flop, sampled on positive clock edge |
| 3 | 1CLK | input | Positive edge-triggered clock input for channel 1 flip-flop |
| 4 | 1PRE | input | Active low preset input for channel 1 flip-flop |
| 5 | 1Q | output | Q output for channel 1 flip-flop |
| 6 | 1Q̄ | output | Inverted Q output (Q-bar) for channel 1 flip-flop |
| 7 | GND | power_in | Ground, common return path for power supply |
| 8 | 2Q̄ | output | Inverted Q output (Q-bar) for channel 2 flip-flop |
| 9 | 2Q | output | Q output for channel 2 flip-flop |
| 10 | 2PRE | input | Active low preset input for channel 2 flip-flop |
| 11 | 2CLK | input | Positive edge-triggered clock input for channel 2 flip-flop |
| 12 | 2D | input | Data input for channel 2 flip-flop, sampled on positive clock edge |
| 13 | 2CLR | input | Active low clear input for channel 2 flip-flop |
| 14 | VCC | power_in | Positive power supply voltage, 2 V to 6 V recommended operating range |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
SN74HC74QDRG4Q1 - Footprint:
Package_SO:SOIC-14_3.9x8.7mm_P1.27mm - 3D model: SOIC-14 (KiCad packages3D, STEP)
- Annotated 3D hero:
sn74hc74qdrg4q1-hero.glb(dashed pad outlines, silkscreen with pin 1, signal names; the adom-hero standard) is what the viewer shows. Downloads and EDA use the clean model,sn74hc74qdrg4q1-etched.glb. - 3D model files:
sn74hc74qdrg4q1-etched.step/sn74hc74qdrg4q1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc74qdrg4q1.step/sn74hc74qdrg4q1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
cc65f48c07b236ea, retrieved 2026-10-02, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# SN74HC74QDRG4Q1
**Texas Instruments** · Flip Flops · SOIC-14
SN74HC74QDRG4Q1 from Texas Instruments, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Active low clear input for channel 1 flip-flop |
| 2 | 1D | input | Data input for channel 1 flip-flop, sampled on positive clock edge |
| 3 | 1CLK | input | Positive edge-triggered clock input for channel 1 flip-flop |
| 4 | 1PRE | input | Active low preset input for channel 1 flip-flop |
| 5 | 1Q | output | Q output for channel 1 flip-flop |
| 6 | 1Q̄ | output | Inverted Q output (Q-bar) for channel 1 flip-flop |
| 7 | GND | power_in | Ground, common return path for power supply |
| 8 | 2Q̄ | output | Inverted Q output (Q-bar) for channel 2 flip-flop |
| 9 | 2Q | output | Q output for channel 2 flip-flop |
| 10 | 2PRE | input | Active low preset input for channel 2 flip-flop |
| 11 | 2CLK | input | Positive edge-triggered clock input for channel 2 flip-flop |
| 12 | 2D | input | Data input for channel 2 flip-flop, sampled on positive clock edge |
| 13 | 2CLR | input | Active low clear input for channel 2 flip-flop |
| 14 | VCC | power_in | Positive power supply voltage, 2 V to 6 V recommended operating range |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `SN74HC74QDRG4Q1`
- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`
- 3D model: SOIC-14 (KiCad packages3D, STEP)
- Annotated 3D hero: `sn74hc74qdrg4q1-hero.glb` (dashed pad outlines, silkscreen with pin 1, signal names; the [adom-hero standard](https://wiki.adom.inc/adom/component-hero)) is what the viewer shows. Downloads and EDA use the clean model, `sn74hc74qdrg4q1-etched.glb`.
- 3D model files: `sn74hc74qdrg4q1-etched.step` / `sn74hc74qdrg4q1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc74qdrg4q1.step` / `sn74hc74qdrg4q1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc74-q1) (25 pp, sha256 `cc65f48c07b236ea`, retrieved 2026-10-02, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/sn74hc74qdrg4q1-datasheet.pdf)