# SN74HC74MPWREP

**Texas Instruments** · Flip Flops · TSSOP-14

SN74HC74MPWREP from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1CLR | input | Active-low asynchronous clear input for flip-flop 1; a low level resets the outputs regardless of other inputs, and unused inputs must be held at VCC or GND. |
| 2 | 1D | input | Data input for flip-flop 1, transferred to the outputs on the positive-going edge of 1CLK when PRE and CLR are inactive (high). |
| 3 | 1CLK | input | Clock input for flip-flop 1, positive edge triggered. |
| 4 | 1PRE | input | Active-low asynchronous preset input for flip-flop 1; a low level sets the outputs regardless of other inputs. |
| 5 | 1Q | output | True output of flip-flop 1, with ±4 mA output drive at 5 V. |
| 6 | 1Q̅ | output | Complementary output of flip-flop 1, with ±4 mA output drive at 5 V. |
| 7 | GND | power_in | Ground; continuous current through VCC or GND is limited to ±50 mA. |
| 8 | 2Q̅ | output | Complementary output of flip-flop 2, with ±4 mA output drive at 5 V. |
| 9 | 2Q | output | True output of flip-flop 2, with ±4 mA output drive at 5 V. |
| 10 | 2PRE | input | Active-low asynchronous preset input for flip-flop 2; a low level sets the outputs regardless of other inputs. |
| 11 | 2CLK | input | Clock input for flip-flop 2, positive edge triggered. |
| 12 | 2D | input | Data input for flip-flop 2, transferred to the outputs on the positive-going edge of 2CLK when PRE and CLR are inactive (high). |
| 13 | 2CLR | input | Active-low asynchronous clear input for flip-flop 2; a low level resets the outputs regardless of other inputs. |
| 14 | VCC | power_in | Supply voltage, recommended 2 V to 6 V (absolute maximum 7 V). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `SN74HC74MPWREP`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `sn74hc74mpwrep-etched.step` / `sn74hc74mpwrep-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc74mpwrep.step` / `sn74hc74mpwrep.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/sn74hc74-ep) (13 pp, sha256 `204c898314ed14f1`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74hc74mpwrep-datasheet.pdf)