component

SN74HC688 8-Bit Comparator

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by adom

8-bit magnitude/identity comparator with a single active-low equality output.

logiccomparatoridentitymagnitude74hctisoic-20
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SN74HC688

Texas Instruments · Comparator · SOIC-20

The SN74HC688 is an 8-bit identity comparator. It compares two 8-bit words (P and Q) and drives its output low only when all eight bit pairs match and the enable is active. It is commonly used for address decoding, equality detection, and match logic.

Pinout

Pin Name Type Function
1 OE input Active-low output-enable. When high, forces the P=Q output high regardless of data inputs. When low, enables the comparator output.
2 P0 input P-word bit 0 data input. Compared against Q0 via an XNOR stage.
3 Q0 input Q-word bit 0 data input. Compared against P0 via an XNOR stage.
4 P1 input P-word bit 1 data input. Compared against Q1 via an XNOR stage.
5 Q1 input Q-word bit 1 data input. Compared against P1 via an XNOR stage.
6 P2 input P-word bit 2 data input. Compared against Q2 via an XNOR stage.
7 Q2 input Q-word bit 2 data input. Compared against P2 via an XNOR stage.
8 P3 input P-word bit 3 data input. Compared against Q3 via an XNOR stage.
9 Q3 input Q-word bit 3 data input. Compared against P3 via an XNOR stage.
10 GND power_in Ground reference (0 V) for the device.
11 P4 input P-word bit 4 data input. Compared against Q4 via an XNOR stage.
12 Q4 input Q-word bit 4 data input. Compared against P4 via an XNOR stage.
13 P5 input P-word bit 5 data input. Compared against Q5 via an XNOR stage.
14 Q5 input Q-word bit 5 data input. Compared against P5 via an XNOR stage.
15 P6 input P-word bit 6 data input. Compared against Q6 via an XNOR stage.
16 Q6 input Q-word bit 6 data input. Compared against P6 via an XNOR stage.
17 P7 input P-word bit 7 (MSB) data input. Compared against Q7 via an XNOR stage.
18 Q7 input Q-word bit 7 (MSB) data input. Compared against P7 via an XNOR stage.
19 P=Q output Active-low comparator output. Asserted low when the P and Q words are equal AND OE is low; otherwise forced high. Drives ±4 mA at 5 V, up to 10 LSTTL loads.
20 VCC power_in Positive supply voltage, 2 V to 6 V recommended (5 V nominal). Requires a 0.1 µF bypass capacitor placed close to the pin.

Key specifications

Parameter Value
Type 8-bit identity (magnitude) comparator
Logic family 74HC (CMOS)
Output Single active-low P = Q
Enable Active-low
Supply voltage 2 V to 6 V
Propagation delay 20 ns typ at 5 V
Operating temperature -40 C to 85 C

Ordering variants

Same part, different packaging or reel option.

  • SN74HC688DW
  • SN74HC688N
  • SN74HC688PWR
  • SN74HC688PW
  • SN74HC688J
  • SN74HC688FK

CAD (KiCad official)

  • Symbol: sn74hc688.kicad_sym
  • Footprint: sn74hc688.kicad_mod
  • 3D model: SOIC-20 wide body from KiCad Package_SO/SOIC-20W_7.5x12.8mm_P1.27mm.
  • 3D model files: sn74hc688-etched.step / sn74hc688-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc688.step / sn74hc688.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (24 pp, sha256 d600a33f4ebb7089, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF