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SN74HC595DWR
Public Made by Adomby adom
Texas Instruments Shift Registers, SOIC-16-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC595DWR
Texas Instruments · Shift Registers · SOIC-16-300mil
SN74HC595DWR from Texas Instruments, in a SOIC-16-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | QB | tri_state | Shift register stage 1 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 2 | QC | tri_state | Shift register stage 2 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 3 | QD | tri_state | Shift register stage 3 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 4 | QE | tri_state | Shift register stage 4 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 5 | QF | tri_state | Shift register stage 5 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 6 | QG | tri_state | Shift register stage 6 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 7 | QH | tri_state | Shift register stage 7 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 8 | GND | power_in | Ground power supply reference pin. |
| 9 | QH' | tri_state | Storage register stage 8 Q output with tri-state control by OE pin, drives up to ±4mA at 5V supply. |
| 10 | SRCLR | input | Shift register clear input, active low, asynchronously resets all shift register flip-flops when pulled low. |
| 11 | SRCLK | input | Shift register clock input, rising edge clocks serial data through shift register with 13ns typical propagation delay. |
| 12 | RCLK | input | Storage register clock input, rising edge transfers shift register data to parallel outputs QA through QH'. |
| 13 | OE | input | Output enable input, active low, drives QA through QH' outputs to high impedance when high. |
| 14 | SER | input | Serial data input for shift register, sampled on rising edge of SRCLK with 25ns typical setup time at 5V. |
| 15 | QA | tri_state | Shift register stage 0 Q output with tri-state control by OE pin, drives up to ±6mA at 5V supply. |
| 16 | VCC | power_in | Positive power supply input, 2V to 6V operating range, requires 0.1μF bypass capacitor. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16-300mil |
| Category | Logic |
| Pins | 16 |
CAD (KiCad official)
- Symbol:
SN74HC595DWR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16-300mil (KiCad packages3D, STEP)
- 3D model files:
sn74hc595dwr-etched.step/sn74hc595dwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc595dwr.step/sn74hc595dwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (42 pp, sha256
4862b39a3fdde756, retrieved 2026-09-26, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).