SN74HC595DR

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  "type": "component",
  "slug": "sn74hc595dr",
  "title": "SN74HC595DR",
  "brief": "Texas Instruments Shift Registers, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
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    "sn74hc595dr"
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  "component": {
    "mpn": "SN74HC595DR",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-16",
    "pin_count": 16,
    "category": "Logic",
    "subcategory": "Shift Registers",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc595.pdf",
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    "pins": [
      {
        "number": "1",
        "name": "QB",
        "type": "tri_state",
        "description": "Parallel 3-state output B from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "2",
        "name": "QC",
        "type": "tri_state",
        "description": "Parallel 3-state output C from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "3",
        "name": "QD",
        "type": "tri_state",
        "description": "Parallel 3-state output D from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "4",
        "name": "QE",
        "type": "tri_state",
        "description": "Parallel 3-state output E from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "5",
        "name": "QF",
        "type": "tri_state",
        "description": "Parallel 3-state output F from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "6",
        "name": "QG",
        "type": "tri_state",
        "description": "Parallel 3-state output G from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "7",
        "name": "QH",
        "type": "tri_state",
        "description": "Parallel 3-state output H from the storage register. Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "8",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device."
      },
      {
        "number": "9",
        "name": "QH'",
        "type": "output",
        "description": "Serial output from the shift register (not 3-stated). Used for cascading additional SN74HC595 devices - connect to the SER input of the next stage. Reflects the shift-register QH bit."
      },
      {
        "number": "10",
        "name": "SRCLR",
        "type": "input",
        "description": "Active-low shift-register clear input. When low, asynchronously clears the 8-bit shift register. Does not affect the storage register."
      },
      {
        "number": "11",
        "name": "SRCLK",
        "type": "input",
        "description": "Shift-register clock input. Serial data on SER is shifted into the shift register on the rising edge. Max clock frequency ~25 MHz at 4.5 V."
      },
      {
        "number": "12",
        "name": "RCLK",
        "type": "input",
        "description": "Storage-register (latch) clock input. On the rising edge, the shift-register contents are transferred to the 8-bit D-type storage register that drives QA-QH."
      },
      {
        "number": "13",
        "name": "OE",
        "type": "input",
        "description": "Active-low output-enable input. When high, parallel outputs QA-QH are placed in the high-impedance state. Does not affect the storage register contents."
      },
      {
        "number": "14",
        "name": "SER",
        "type": "input",
        "description": "Serial data input to the shift register. Sampled on the rising edge of SRCLK. Setup time 20 ns at 4.5 V."
      },
      {
        "number": "15",
        "name": "QA",
        "type": "tri_state",
        "description": "Parallel 3-state output A from the storage register (LSB of output byte). Drives up to 15 LSTTL loads (±6 mA at 5 V). High-impedance when OE is high."
      },
      {
        "number": "16",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply voltage input. Operating range 2 V to 6 V (5 V nominal). Bypass locally with a 0.1 µF ceramic capacitor to GND."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc595.pdf",
        "pages": 41,
        "sha256": "215816945704e561",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 16,
        "described": 16,
        "cites_pages": true,
        "refuses_to_fabricate": true
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    },
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    "logic": {
      "family_id": "74HC595",
      "logic_family": "74HC",
      "function_code": "595",
      "function_class": "ShiftRegister",
      "function_name": "8-Bit SIPO Shift Register with Output Latch",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
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        "zmin_mm": -0.0,
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  },
  "metadata": {
    "specs": {
      "Manufacturer": "Texas Instruments",
      "Package": "SOIC-16",
      "Category": "Logic",
      "Pins": "16"
    }
  },
  "variants": [
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      "mpn": "SN74HC595DRD",
      "kind": "packaging"
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    {
      "mpn": "SN74HC595DR",
      "kind": "packaging"
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    {
      "mpn": "SN74HC595DRDW",
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    {
      "mpn": "SN74HC595DRDWR",
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    {
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    {
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    {
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    {
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  "discovery_pitch": "SN74HC595DR (Texas Instruments) component page with datasheet-verified CAD.",
  "author": {
    "name": "Ray",
    "email": "[email protected]"
  },
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  "updated_at": "2026-09-25T07:09:47.350Z"
}