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SN74HC574D

Public Made by Adom

by adom

lingxingic Flip Flops, SOP-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74HC574D

lingxingic · Flip Flops · SOP-20-300mil

SN74HC574D from lingxingic, in a SOP-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Active-low 3-state output enable; when OE is high the Qn outputs go high-impedance, and changes on OE do not affect the flip-flop state.
2 D0 input Data input to flip-flop FF1, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
3 D1 input Data input to flip-flop FF2, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
4 D2 input Data input to flip-flop FF3, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
5 D3 input Data input to flip-flop FF4, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
6 D4 input Data input to flip-flop FF5, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
7 D5 input Data input to flip-flop FF6, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
8 D6 input Data input to flip-flop FF7, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
9 D7 input Data input to flip-flop FF8, sampled on the rising edge of CP with the setup and hold times given in the timing tables.
10 GND power_in Ground reference (0 V).
11 CP input Clock input; the flip-flops are triggered on the rising edge.
12 Q7 tri_state 3-state flip-flop output Q7; high-impedance when OE is high.
13 Q6 tri_state 3-state flip-flop output Q6; high-impedance when OE is high.
14 Q5 tri_state 3-state flip-flop output Q5; high-impedance when OE is high.
15 Q4 tri_state 3-state flip-flop output Q4; high-impedance when OE is high.
16 Q3 tri_state 3-state flip-flop output Q3; high-impedance when OE is high.
17 Q2 tri_state 3-state flip-flop output Q2; high-impedance when OE is high.
18 Q1 tri_state 3-state flip-flop output Q1; high-impedance when OE is high.
19 Q0 tri_state 3-state flip-flop output Q0; high-impedance when OE is high.
20 VCC power_in Supply voltage; recommended 2.0-6.0 V for SN74HC574 and 4.5-5.5 V for SN74HCT574, with absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package SOP-20-300mil
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
电源电压 VCC -0.5 7 V 6
输入钳位电流 IIK -20 20 mA VI<-0.5V或VI>VCC+0.5V 6
输出钳位电流 IOK -20 20 mA VO<-0.5V或VO>VCC+0.5V 6
输出电流 IO -35 35 mA -0.5V<VO<VCC+0.5V 6
电源电流 ICC 70 mA 6
地电流 IGND -70 mA 6
贮存温度 Tstg -65 150 ℃ 6
总功耗 Ptot 500 mW 6
焊接温度 TL 260 ℃ 10 s, SOP/TSSOP/SOP(M) 6
电源电压 VCC 2 5 6 V SN74HC574 7
输入电压 VI 0 V SN74HC574; max printed as VCC 7
输出电压 VO 0 V SN74HC574; max printed as VCC 7
工作环境温度 Tamb -40 125 ℃ SN74HC574 7
高电平输入电压 VIH 1.5 1.2 V Tamb=25℃; VCC=2.0V 7
高电平输入电压 VIH 3.15 2.4 V Tamb=25℃; VCC=4.5V 7
高电平输入电压 VIH 4.2 3.2 V Tamb=25℃; VCC=6.0V 7
低电平输入电压 VIL 0.8 0.5 V Tamb=25℃; VCC=2.0V 7
低电平输入电压 VIL 2.1 1.35 V Tamb=25℃; VCC=4.5V 7
低电平输入电压 VIL 2.8 1.8 V Tamb=25℃; VCC=6.0V 7
高电平输出电压 VOH 1.9 2 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=2.0V 7
高电平输出电压 VOH 4.4 4.5 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=4.5V 7
高电平输出电压 VOH 5.9 6 V Tamb=25℃; VI=VIH或VIL; IO=-20uA; VCC=6.0V 7
高电平输出电压 VOH 3.98 4.32 V Tamb=25℃; VI=VIH或VIL; IO=-6.0mA; VCC=4.5V 7
高电平输出电压 VOH 5.48 5.81 V Tamb=25℃; VI=VIH或VIL; IO=-7.8mA; VCC=6.0V 7
低电平输出电压 VOL 0 0.1 V Tamb=25℃; VI=VIH或VIL; IO=20uA; VCC=2.0V 7
低电平输出电压 VOL 0.15 0.26 V Tamb=25℃; VI=VIH或VIL; IO=6.0mA; VCC=4.5V 7
低电平输出电压 VOL 0.16 0.26 V Tamb=25℃; VI=VIH或VIL; IO=7.8mA; VCC=6.0V 7
输入漏电流 II -1 1 uA Tamb=25℃; VI=VCC或GND; VCC=6.0V 7
截止状态输出电流 IOZ -1 1 uA Tamb=25℃; VI=VIH或VIL; VCC=6.0V; VO=VCC或GND 7
静态电流 ICC 8 uA Tamb=25℃; VI=VCC或GND; IO=0A; VCC=6.0V 7
高电平输入电压 VIH 3.15 V Tamb=-40℃～+125℃; VCC=4.5V 9
高电平输入电压 VIH 4.2 V Tamb=-40℃～+125℃; VCC=6.0V 9
低电平输入电压 VIL 1.35 V Tamb=-40℃～+125℃; VCC=4.5V 9
低电平输入电压 VIL 1.8 V Tamb=-40℃～+125℃; VCC=6.0V 9
高电平输出电压 VOH 4.4 V Tamb=-40℃～+125℃; VI=VIH或VIL; IO=-20uA; VCC=4.5V 9
高电平输出电压 VOH 3.7 V Tamb=-40℃～+125℃; VI=VIH或VIL; IO=-6.0mA; VCC=4.5V 9
高电平输出电压 VOH 5.2 V Tamb=-40℃～+125℃; VI=VIH或VIL; IO=-7.8mA; VCC=6.0V 9
低电平输出电压 VOL 0.4 V Tamb=-40℃～+125℃; VI=VIH或VIL; IO=6.0mA; VCC=4.5V 9
输入漏电流 II -4 4 uA Tamb=-40℃～+125℃; VI=VCC或GND; VCC=6.0V 9
截止状态输出电流 IOZ -4 4 uA Tamb=-40℃～+125℃; VI=VIH或VIL; VCC=6.0V; VO=VCC或GND 9
静态电流 ICC 160 uA Tamb=-40℃～+125℃; VI=VCC或GND; IO=0A; VCC=6.0V 9
CP到Qn的传输延时 tPLH，tPHL 17 30 ns Tamb=25℃; CL=50pF; VCC=4.5V 10
OE到Qn的使能时间 tPZH，tPZL 16 28 ns Tamb=25℃; CL=50pF; VCC=4.5V 10
OE到Qn的失能时间 tPLZ，tPHZ 14 25 ns Tamb=25℃; CL=50pF; VCC=4.5V 10
转换时间 tTHL，tTLH 5 12 ns Tamb=25℃; CL=50pF; Qn输出; VCC=4.5V 10
脉冲宽度 tW 16 5 ns Tamb=25℃; CP高电平或低电平; VCC=4.5V 10
Dn到CP的建立时间 tsu 12 2 ns Tamb=25℃; CL=50pF; VCC=4.5V 10
Dn到CP的保持时间 th 5 0 ns Tamb=25℃; CL=50pF; VCC=4.5V 10
最大频率 fmax 30 MHz Tamb=25℃; CP输入; VCC=4.5V 10
CP到Qn的传输延时 tPLH，tPHL 45 ns Tamb=-40℃～+125℃; CL=50pF; VCC=4.5V 12
OE到Qn的使能时间 tPZH，tPZL 42 ns Tamb=-40℃～+125℃; CL=50pF; VCC=4.5V 12
OE到Qn的失能时间 tPLZ，tPHZ 38 ns Tamb=-40℃～+125℃; CL=50pF; VCC=4.5V 12
转换时间 tTHL，tTLH 18 ns Tamb=-40℃～+125℃; CL=50pF; Qn输出; VCC=4.5V 12
脉冲宽度 tW 24 ns Tamb=-40℃～+125℃; CL=50pF; CP高电平或低电平; VCC=4.5V 12
Dn到CP的建立时间 tsu 18 ns Tamb=-40℃～+125℃; CL=50pF; VCC=4.5V 12
Dn到CP的保持时间 th 5 ns Tamb=-40℃～+125℃; CL=50pF; VCC=4.5V 12
最大频率 fmax 20 MHz Tamb=-40℃～+125℃; CP输入; VCC=4.5V 12

CAD (KiCad official)

  • Symbol: SN74HC574D
  • Footprint: Package_SO:SOP-20_7.5x12.8mm_P1.27mm
  • 3D model: SOP-20-300mil, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 2.65 mm nominal SOIC height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: sn74hc574d-etched.step / sn74hc574d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc574d.step / sn74hc574d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (20 pp, sha256 4513b7374c86e098, retrieved 2026-10-17, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF