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Contents

README

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SN74HC540PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

SN74HC540PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low output-enable input; when either OE1 or OE2 is high, all eight Y outputs are forced to the high-impedance state.
2 A1 input Buffer/driver data input 1; a low input produces a high on Y1 (inverted data) when enabled.
3 A2 input Buffer/driver data input 2; a low input produces a high on Y2 (inverted data) when enabled.
4 A3 input Buffer/driver data input 3; a low input produces a high on Y3 (inverted data) when enabled.
5 A4 input Buffer/driver data input 4; a low input produces a high on Y4 (inverted data) when enabled.
6 A5 input Buffer/driver data input 5; a low input produces a high on Y5 (inverted data) when enabled.
7 A6 input Buffer/driver data input 6; a low input produces a high on Y6 (inverted data) when enabled.
8 A7 input Buffer/driver data input 7; a low input produces a high on Y7 (inverted data) when enabled.
9 A8 input Buffer/driver data input 8; a low input produces a high on Y8 (inverted data) when enabled.
10 GND power_in Ground reference for the device; must be connected to 0 V.
11 Y8 tri_state 3-state inverted data output corresponding to A8; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
12 Y7 tri_state 3-state inverted data output corresponding to A7; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
13 Y6 tri_state 3-state inverted data output corresponding to A6; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
14 Y5 tri_state 3-state inverted data output corresponding to A5; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
15 Y4 tri_state 3-state inverted data output corresponding to A4; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
16 Y3 tri_state 3-state inverted data output corresponding to A3; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
17 Y2 tri_state 3-state inverted data output corresponding to A2; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
18 Y1 tri_state 3-state inverted data output corresponding to A1; ±6-mA drive at 5 V, high-impedance when OE1 or OE2 is high.
19 OE2 input Active-low output-enable input; when either OE1 or OE2 is high, all eight Y outputs are forced to the high-impedance state.
20 VCC power_in Positive supply voltage input, recommended operating range 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HC540PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc540pwr-etched.step / sn74hc540pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc540pwr.step / sn74hc540pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 ae0e4a4e25a26926, retrieved 2026-09-24, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF