component
SN74HC540 Octal Inverting Buffer
Public Made by Adomby adom
Octal inverting buffer and line driver with 3-state outputs and a flow-through pinout.
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page.json+193−8@@ -1,8 +1,11 @@ {+ "schema_version": 1,+ "type": "component", "slug": "sn74hc540",+ "title": "SN74HC540 Octal Inverting Buffer",+ "brief": "Octal inverting buffer and line driver with 3-state outputs and a flow-through pinout.", "version": "0.1.0",- "type": "component",- "description": "Octal inverting buffer and line driver with 3-state outputs and a flow-through pinout.",+ "license": "CC-BY-SA-4.0", "tags": [ "logic", "buffer",@@ -13,6 +16,193 @@ "ti", "soic-20" ],+ "component": {+ "mpn": "SN74HC540",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-20",+ "pin_count": 20,+ "category": "Logic",+ "subcategory": "Buffer / Line Driver",+ "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc540.pdf",+ "parts": {+ "symbol": "sn74hc540.kicad_sym",+ "footprint": "sn74hc540.kicad_mod",+ "model_3d": "sn74hc540.glb",+ "model_3d_step": "sn74hc540.step"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "OE1",+ "type": "input",+ "description": "Active-low output-enable 1. NORed with OE2; when either OE input is high, all Y outputs are in high-impedance state."+ },+ {+ "number": "2",+ "name": "A1",+ "type": "input",+ "description": "Data input for channel 1. CMOS logic input; drives inverted output Y1 when device is enabled."+ },+ {+ "number": "3",+ "name": "A2",+ "type": "input",+ "description": "Data input for channel 2. Drives inverted output Y2 when device is enabled."+ },+ {+ "number": "4",+ "name": "A3",+ "type": "input",+ "description": "Data input for channel 3. Drives inverted output Y3 when device is enabled."+ },+ {+ "number": "5",+ "name": "A4",+ "type": "input",+ "description": "Data input for channel 4. Drives inverted output Y4 when device is enabled."+ },+ {+ "number": "6",+ "name": "A5",+ "type": "input",+ "description": "Data input for channel 5. Drives inverted output Y5 when device is enabled."+ },+ {+ "number": "7",+ "name": "A6",+ "type": "input",+ "description": "Data input for channel 6. Drives inverted output Y6 when device is enabled."+ },+ {+ "number": "8",+ "name": "A7",+ "type": "input",+ "description": "Data input for channel 7. Drives inverted output Y7 when device is enabled."+ },+ {+ "number": "9",+ "name": "A8",+ "type": "input",+ "description": "Data input for channel 8. Drives inverted output Y8 when device is enabled."+ },+ {+ "number": "10",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V). Return for VCC supply current and CMOS input/output logic levels."+ },+ {+ "number": "11",+ "name": "Y8",+ "type": "tri_state",+ "description": "3-state inverted output for channel 8. High-current CMOS driver, \u00b16 mA at 5 V; drives up to 15 LSTTL loads. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "12",+ "name": "Y7",+ "type": "tri_state",+ "description": "3-state inverted output for channel 7. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "13",+ "name": "Y6",+ "type": "tri_state",+ "description": "3-state inverted output for channel 6. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "14",+ "name": "Y5",+ "type": "tri_state",+ "description": "3-state inverted output for channel 5. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "15",+ "name": "Y4",+ "type": "tri_state",+ "description": "3-state inverted output for channel 4. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "16",+ "name": "Y3",+ "type": "tri_state",+ "description": "3-state inverted output for channel 3. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "17",+ "name": "Y2",+ "type": "tri_state",+ "description": "3-state inverted output for channel 2. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "18",+ "name": "Y1",+ "type": "tri_state",+ "description": "3-state inverted output for channel 1. High-current CMOS driver, \u00b16 mA at 5 V. High-Z when either OE1 or OE2 is high."+ },+ {+ "number": "19",+ "name": "OE2",+ "type": "input",+ "description": "Active-low output-enable 2. NORed with OE1; when either OE input is high, all Y outputs are in high-impedance state."+ },+ {+ "number": "20",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply, 2 V to 6 V recommended (absolute max 7 V). Bypass with 0.1 \u00b5F (optionally paralleled with 1 \u00b5F) placed close to the pin."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/sn74hc540.pdf",+ "pages": 25,+ "sha256": "d54581bf2a2bec36",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Type": "Octal inverting buffer / line driver, 3-state",+ "Logic family": "74HC (CMOS)",+ "Configuration": "8 inverting buffers, flow-through pinout",+ "Supply voltage": "2 V to 6 V",+ "Output current": "+-6 mA at VCC = 4.5 V",+ "Propagation delay": "14 ns typ at 5 V",+ "Operating temperature": "-40 C to 85 C"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "inverting octal buffer",+ "bus driver",+ "3-state inverter",+ "flow-through buffer"+ ],+ "discovery_pitch": "Eight inverting 3-state buffers with a flow-through pinout for clean bus driving and isolation.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -29,10 +219,5 @@ "docs/sn74hc540-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }