# SN74HC4052D

**lingxingic** · Analog Switches, Multiplexers · SOP-16

SN74HC4052D from lingxingic, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 2Y0 | passive | Independent analog input/output of switch 2 channel 0; the switch voltage must stay between VEE and VCC. |
| 2 | 2Y2 | passive | Independent analog input/output of switch 2 channel 2; the switch voltage must stay between VEE and VCC. |
| 3 | 2Z | passive | Common analog input/output of switch 2, connected to the selected 2Yn channel when E is LOW; the voltage may not exceed VCC or VEE. |
| 4 | 2Y3 | passive | Independent analog input/output of switch 2 channel 3; the switch voltage must stay between VEE and VCC. |
| 5 | 2Y1 | passive | Independent analog input/output of switch 2 channel 1; the switch voltage must stay between VEE and VCC. |
| 6 | E | input | Enable input, active LOW; when HIGH all switches are turned off, and input levels are CMOS for HC and TTL for HCT. |
| 7 | VEE | power_in | Negative supply voltage; recommended VCC - VEE is 3.0 V to 9.0 V and the switch voltages are referenced to it. |
| 8 | GND | power_in | Ground supply voltage; recommended VCC - GND is 3.0 V to 9.0 V for 74HC4052 and 4.5 V to 5.5 V for 74HCT4052. |
| 9 | S1 | input | Select logic input for the channel decoder (S1 S0 = 00 selects nY0, 01 selects nY1, 10 selects nY2, 11 selects nY3); input voltage range is 0 V to VCC. |
| 10 | S0 | input | Select logic input for the channel decoder (S1 S0 = 00 selects nY0, 01 selects nY1, 10 selects nY2, 11 selects nY3); input voltage range is 0 V to VCC. |
| 11 | 1Y3 | passive | Independent analog input/output of switch 1 channel 3; the switch voltage must stay between VEE and VCC. |
| 12 | 1Y0 | passive | Independent analog input/output of switch 1 channel 0; the switch voltage must stay between VEE and VCC. |
| 13 | 1Z | passive | Common analog input/output of switch 1, connected to the selected 1Yn channel when E is LOW; the voltage may not exceed VCC or VEE. |
| 14 | 1Y1 | passive | Independent analog input/output of switch 1 channel 1; the switch voltage must stay between VEE and VCC. |
| 15 | 1Y2 | passive | Independent analog input/output of switch 1 channel 2; the switch voltage must stay between VEE and VCC. |
| 16 | VCC | power_in | Positive supply voltage; absolute maximum is +11 V and recommended VCC - GND is 3.0 V to 9.0 V (HC) or 4.5 V to 5.5 V (HCT). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | lingxingic |
| Package | SOP-16 |
| Category | Interface |
| Pins | 16 |

## CAD (KiCad official)

- Symbol: `SN74HC4052D`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files: `sn74hc4052d-etched.step` / `sn74hc4052d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `sn74hc4052d.step` / `sn74hc4052d.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [lingxingic datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590923055466164224) (27 pp, sha256 `ef0c375a4c8c0c80`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/sn74hc4052d-datasheet.pdf)