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SN74HC377NSR
Public Made by Adomby adom
Texas Instruments Flip Flops, SOIC-20-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC377NSR
Texas Instruments · Flip Flops · SOIC-20-208mil
SN74HC377NSR from Texas Instruments, in a SOIC-20-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CLKEN | input | Latched, active-low clock-enable input; when high the flip-flop outputs hold their previous state (Q0) regardless of CLK, and the input is latched to prevent false clocking by transitions on this pin. |
| 2 | 1Q | output | Data output of flip-flop 1, updated to the value of D1 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 3 | 1D | input | Data input of flip-flop 1; must meet the specified setup time before the positive-going edge of CLK to be latched to output 1Q. |
| 4 | 2D | input | Data input of flip-flop 2; must meet the specified setup time before the positive-going edge of CLK to be latched to output 2Q. |
| 5 | 2Q | output | Data output of flip-flop 2, updated to the value of D2 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 6 | 3Q | output | Data output of flip-flop 3, updated to the value of D3 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 7 | 3D | input | Data input of flip-flop 3; must meet the specified setup time before the positive-going edge of CLK to be latched to output 3Q. |
| 8 | 4D | input | Data input of flip-flop 4; must meet the specified setup time before the positive-going edge of CLK to be latched to output 4Q. |
| 9 | 4Q | output | Data output of flip-flop 4, updated to the value of D4 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 10 | GND | power_in | Ground reference (0 V) supply pin. |
| 11 | CLK | input | Common clock input; data at the D inputs meeting setup time is transferred to the Q outputs on the positive-going edge of this clock when CLKEN is low. |
| 12 | 5Q | output | Data output of flip-flop 5, updated to the value of D5 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 13 | 5D | input | Data input of flip-flop 5; must meet the specified setup time before the positive-going edge of CLK to be latched to output 5Q. |
| 14 | 6D | input | Data input of flip-flop 6; must meet the specified setup time before the positive-going edge of CLK to be latched to output 6Q. |
| 15 | 6Q | output | Data output of flip-flop 6, updated to the value of D6 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 16 | 7Q | output | Data output of flip-flop 7, updated to the value of D7 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 17 | 7D | input | Data input of flip-flop 7; must meet the specified setup time before the positive-going edge of CLK to be latched to output 7Q. |
| 18 | 8D | input | Data input of flip-flop 8; must meet the specified setup time before the positive-going edge of CLK to be latched to output 8Q. |
| 19 | 8Q | output | Data output of flip-flop 8, updated to the value of D8 on the positive-going edge of CLK when CLKEN is low; can drive up to 10 LSTTL loads. |
| 20 | VCC | power_in | Positive supply voltage input; recommended operating range is 2 V to 6 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-20-208mil |
| Category | Logic |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
SN74HC377NSR - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-208mil (KiCad packages3D, STEP)
- 3D model files:
sn74hc377nsr-etched.step/sn74hc377nsr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc377nsr.step/sn74hc377nsr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
6f18bb15e374ea82, retrieved 2026-09-24, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-sonnet-5(text+vision), consensusclaude-opus-4-8(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).