component
SN74HC374PW
Public Made by Adomby adom
lingxingic Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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"title": "SN74HC374PW",
"brief": "lingxingic Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
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"manufacturer": "lingxingic",
"package": "TSSOP-20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Flip Flops",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590923055323693056",
"parts": {
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"footprint": "sn74hc374pw.kicad_mod",
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"lbr": "sn74hc374pw.lbr"
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"distributor_links": {
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"distributor_check": {
"checked_at": "2026-10-19T04:46:10Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "no match"
},
"mouser": {
"pn": null,
"status": "no match"
}
},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "Active-low output enable; when high, outputs Q0 to Q7 go to high impedance (Z) without changing the stored register state."
},
{
"number": "2",
"name": "Q0",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 0; high impedance while OE is high."
},
{
"number": "3",
"name": "D0",
"type": "input",
"description": "Data input to flip-flop 0, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "4",
"name": "D1",
"type": "input",
"description": "Data input to flip-flop 1, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "5",
"name": "Q1",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 1; high impedance while OE is high."
},
{
"number": "6",
"name": "Q2",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 2; high impedance while OE is high."
},
{
"number": "7",
"name": "D2",
"type": "input",
"description": "Data input to flip-flop 2, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "8",
"name": "D3",
"type": "input",
"description": "Data input to flip-flop 3, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "9",
"name": "Q3",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 3; high impedance while OE is high."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference, 0 V."
},
{
"number": "11",
"name": "CP",
"type": "input",
"description": "Clock input; the flip-flops capture D on the low-to-high (rising) clock edge."
},
{
"number": "12",
"name": "Q4",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 4; high impedance while OE is high."
},
{
"number": "13",
"name": "D4",
"type": "input",
"description": "Data input to flip-flop 4, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "14",
"name": "D5",
"type": "input",
"description": "Data input to flip-flop 5, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "15",
"name": "Q5",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 5; high impedance while OE is high."
},
{
"number": "16",
"name": "Q6",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 6; high impedance while OE is high."
},
{
"number": "17",
"name": "D6",
"type": "input",
"description": "Data input to flip-flop 6, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "18",
"name": "D7",
"type": "input",
"description": "Data input to flip-flop 7, which must meet the setup and hold times relative to the rising edge of CP."
},
{
"number": "19",
"name": "Q7",
"type": "tri_state",
"description": "Three-state, non-inverting data output of flip-flop 7; high impedance while OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Supply voltage; absolute maximum 7.0 V and recommended range 2.0 V to 6.0 V for the SN74HC374."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
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"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The pin-number-to-function table (pages 5-6) is generic for the SN74HC/HCT374 and is not split by pa; The ordering table on page 3 lists SN74HC374PW under TSSOP20 (4000 pcs reel), but the extracted text; The datasheet does not label the Q outputs as tri-state in the pin table. They are typed tri_state b"
],
"pages_sent": 21,
"cost_usd": 0.0841,
"at": "2026-10-19T04:43:52"
},
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"sha256": "e6d21ba7a671b3e3",
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"cad": "KiCad official (CC-BY-SA 4.0)",
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"Package": "TSSOP-20",
"Category": "Logic",
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"name": "Supply current (absolute max)",
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{
"name": "Soldering temperature",
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"typ": null,
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"conditions": "10秒; SOP/TSSOP/SOP(M)",
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"name": "Output voltage (recommended)",
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{
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{
"name": "Input rise and fall rate",
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{
"name": "Operating ambient temperature",
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"name": "High-level input voltage",
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{
"name": "High-level input voltage",
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"name": "High-level input voltage",
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{
"name": "Low-level input voltage",
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"conditions": "Tamb=-40~125℃; VCC=2.0V",
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{
"name": "Low-level input voltage",
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"name": "Low-level input voltage",
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{
"name": "High-level output voltage",
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"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=-20uA；VCC=2.0V",
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{
"name": "High-level output voltage",
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"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=-20uA；VCC=4.5V",
"source_page": 8,
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{
"name": "High-level output voltage",
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"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=-20uA；VCC=6.0V",
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{
"name": "High-level output voltage",
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"kind": "electrical",
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"min": 3.7,
"typ": null,
"max": null,
"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=-6.0mA；VCC=4.5V",
"source_page": 8,
"source": "datasheet"
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{
"name": "High-level output voltage",
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"typ": null,
"max": null,
"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=-7.8mA；VCC=6.0V",
"source_page": 8,
"source": "datasheet"
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{
"name": "Low-level output voltage",
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"conditions": "Tamb=-40~125℃; VI=VIH或VIL；IO=20uA；VCC=2.0V",
"source_page": 8,
"source": "datasheet"
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{
"name": "Low-level output voltage",
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"source_page": 8,
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{
"name": "Input leakage current",
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"min": -1,
"typ": null,
"max": 1,
"conditions": "Tamb=-40~125℃; VI=VCC或GND；VCC=6.0V",
"source_page": 8,
"source": "datasheet"
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{
"name": "Off-state output current",
"symbol": "IOZ",
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"conditions": "Tamb=-40~125℃; VI=VIH或VIL；VCC=6.0V；VO=VCC或GND",
"source_page": 8,
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{
"name": "Quiescent supply current",
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"conditions": "Tamb=-40~125℃; VI=VCC或GND；IO=0A；VCC=6.0V",
"source_page": 8,
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{
"name": "Propagation delay CP to Qn",
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"typ": null,
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"conditions": "Tamb=-40~125℃; 见图6; VCC=2.0V",
"source_page": 12,
"source": "datasheet"
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{
"name": "Propagation delay CP to Qn",
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"typ": null,
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"conditions": "Tamb=-40~125℃; 见图6; VCC=4.5V",
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{
"name": "Propagation delay CP to Qn",
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"conditions": "Tamb=-40~125℃; 见图6; VCC=6.0V",
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{
"name": "Enable time OE to Qn",
"symbol": "ten",
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"typ": null,
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"conditions": "Tamb=-40~125℃; 见图7; VCC=2.0V",
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{
"name": "Enable time OE to Qn",
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"conditions": "Tamb=-40~125℃; 见图7; VCC=4.5V",
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{
"name": "Enable time OE to Qn",
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"conditions": "Tamb=-40~125℃; 见图7; VCC=6.0V",
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{
"name": "Disable time OE to Qn",
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