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Contents

README

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SN74HC373PWR

Texas Instruments · Latches · TSSOP-20

SN74HC373PWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE input Output enable, active low; enables 3-state output drivers when low (±6 mA at 5V, ±7.8 mA at 6V), tri-states all outputs when high
2 1Q tri_state Latch output for channel 1; 3-state output follows 1D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
3 1D input Data input for channel 1; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
4 2D input Data input for channel 2; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
5 2Q tri_state Latch output for channel 2; 3-state output follows 2D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
6 3Q tri_state Latch output for channel 3; 3-state output follows 3D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
7 3D input Data input for channel 3; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
8 4D input Data input for channel 4; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
9 4Q tri_state Latch output for channel 4; 3-state output follows 4D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
10 GND power_in Ground, 0V reference; maximum continuous current ±70 mA per absolute maximum ratings
11 LE input Latch enable, active high; Q outputs follow D inputs transparently when high, hold state when low, input range 0V to VCC
12 5Q tri_state Latch output for channel 5; 3-state output follows 5D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
13 5D input Data input for channel 5; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
14 6D input Data input for channel 6; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
15 6Q tri_state Latch output for channel 6; 3-state output follows 6D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
16 7Q tri_state Latch output for channel 7; 3-state output follows 7D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
17 7D input Data input for channel 7; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
18 8D input Data input for channel 8; input voltage range 0V to VCC, setup time 15 ns at 4.5V before LE going low
19 8Q tri_state Latch output for channel 8; 3-state output follows 8D input when LE is high, holds state when LE is low, ±6 mA drive at 5V
20 VCC power_in Positive supply voltage, 2V to 6V recommended operating range; maximum supply current 160 µA at quiescent condition

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HC373PWR
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc373pwr-etched.step / sn74hc373pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc373pwr.step / sn74hc373pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (38 pp, sha256 14e811d116887347, retrieved 2026-09-22, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF