component
SN74HC373DTR
Public Made by Adomby adom
XBLW Latches, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"schema_version": 1,
"type": "component",
"slug": "sn74hc373dtr",
"title": "SN74HC373DTR",
"brief": "XBLW Latches, SOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"sn74hc373dtr",
"factory-2.0.0",
"extractor-text"
],
"component": {
"mpn": "SN74HC373DTR",
"manufacturer": "XBLW",
"package": "SOP-20",
"pin_count": 20,
"category": "Logic",
"subcategory": "Latches",
"datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906094506094592",
"parts": {
"symbol": "sn74hc373dtr.kicad_sym",
"footprint": "sn74hc373dtr.kicad_mod",
"model_3d": "sn74hc373dtr-hero.glb",
"model_3d_plain": "sn74hc373dtr-etched.glb",
"model_3d_step": "sn74hc373dtr-etched.step",
"model_3d_step_plain": "sn74hc373dtr.step",
"lbr": "sn74hc373dtr.lbr"
},
"distributor_links": {
"lcsc": "C18723523"
},
"distributor_check": {
"checked_at": "2026-10-18T11:58:39Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": null,
"status": "quota"
},
"mouser": {
"pn": null,
"status": "quota"
}
},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "3-state output enable input, active LOW; HIGH forces all Q outputs to high-impedance state."
},
{
"number": "2",
"name": "Q0",
"type": "tri_state",
"description": "3-state latch output for bit 0; reflects D0 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "3",
"name": "D0",
"type": "input",
"description": "Data input for latch 0; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "4",
"name": "D1",
"type": "input",
"description": "Data input for latch 1; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "5",
"name": "Q1",
"type": "tri_state",
"description": "3-state latch output for bit 1; reflects D1 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "6",
"name": "Q2",
"type": "tri_state",
"description": "3-state latch output for bit 2; reflects D2 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "7",
"name": "D2",
"type": "input",
"description": "Data input for latch 2; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "8",
"name": "D3",
"type": "input",
"description": "Data input for latch 3; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "9",
"name": "Q3",
"type": "tri_state",
"description": "3-state latch output for bit 3; reflects D3 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference, 0 V."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable input, active HIGH; while HIGH the latches are transparent; a HIGH-to-LOW transition stores the data present at the D inputs."
},
{
"number": "12",
"name": "Q4",
"type": "tri_state",
"description": "3-state latch output for bit 4; reflects D4 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "13",
"name": "D4",
"type": "input",
"description": "Data input for latch 4; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "14",
"name": "D5",
"type": "input",
"description": "Data input for latch 5; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "15",
"name": "Q5",
"type": "tri_state",
"description": "3-state latch output for bit 5; reflects D5 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "16",
"name": "Q6",
"type": "tri_state",
"description": "3-state latch output for bit 6; reflects D6 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "17",
"name": "D6",
"type": "input",
"description": "Data input for latch 6; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "18",
"name": "D7",
"type": "input",
"description": "Data input for latch 7; inputs include clamp diodes to interface voltages in excess of VCC."
},
{
"number": "19",
"name": "Q7",
"type": "tri_state",
"description": "3-state latch output for bit 7; reflects D7 when LE is HIGH, holds last state when LE goes LOW, high-Z when OE is HIGH."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Positive supply voltage; recommended operating range 2.0 V to 6.0 V, absolute maximum +7.0 V."
}
],
"provenance": {
"extractor": "extract_pins 0.2",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.2",
"primary_model": "claude-sonnet-4-6",
"primary_mode": "vision",
"consensus_model": "claude-opus-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"vision extraction: provenance cannot be text-verified; needs consensus"
],
"pages_sent": 12,
"cost_usd": 0.3581,
"at": "2026-10-18T11:52:07"
},
"datasheet": {
"url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590906094506094592",
"pages": 20,
"sha256": "db32ab70148c9cf4",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "sn74hc373dtr.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.26,
12.8,
2.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "ec70accc2e916ee66e280cf309dac270de2e0b0e12f3431bd2383269d3297abe",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74hc373dtr-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.26,
12.8,
2.65
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "7bffd541ea9d39fe2892395ac4ff553397e5d480aa31aad8582d6a8c30766f34",
"checked": "2026-10-18",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Manufacturer": "XBLW",
"Package": "SOP-20",
"Category": "Logic",
"Pins": "20"
}
},
"variants": [],
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sn74hc373dtr"
],
"discovery_pitch": "SN74HC373DTR (XBLW) component page: datasheet pinout, KiCad symbol, footprint and 3D.",
"author": {
"name": "Ray",
"email": "[email protected]"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sn74hc373dtr.kicad_sym",
"sn74hc373dtr.kicad_mod",
"sn74hc373dtr.glb",
"sn74hc373dtr.step",
"sn74hc373dtr.lbr",
"docs/hero.png",
"docs/sn74hc373dtr-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sn74hc373dtr-hero.glb",
"sn74hc373dtr-hero.overlay.json",
"sn74hc373dtr-etched.glb"
],
"visibility": {
"public": true
}
}