component
SN74HC373
Public Made by Adomby adom
TI octal transparent D latch with 3-state outputs, SOIC-20. Latch-enable + output-enable, 2-6 V. Datasheet-verified.
main
Ray
sn74hc373: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding)
54b1e93
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{
"schema_version": 1,
"type": "component",
"slug": "sn74hc373",
"title": "SN74HC373",
"brief": "TI octal transparent D latch with 3-state outputs, SOIC-20. Latch-enable + output-enable, 2-6 V. Datasheet-verified.",
"version": "0.1.0",
"license": "CC-BY-SA-4.0",
"tags": [
"component",
"logic",
"latch",
"transparent-latch",
"74hc",
"soic-20",
"texas-instruments"
],
"component": {
"mpn": "SN74HC373",
"manufacturer": "Texas Instruments",
"package": "SOIC-20",
"pin_count": 20,
"category": "Logic IC",
"subcategory": "Octal transparent D latch (3-state)",
"datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc373.pdf",
"parts": {
"symbol": "sn74hc373.kicad_sym",
"footprint": "sn74hc373.kicad_mod",
"model_3d": "sn74hc373-etched.glb",
"model_3d_plain": "sn74hc373.glb",
"lbr": "sn74hc373.lbr",
"model_3d_step": "sn74hc373-etched.step",
"model_3d_step_plain": "sn74hc373.step"
},
"distributor_links": {},
"pins": [
{
"number": "1",
"name": "OE",
"type": "input",
"description": "Active-low output enable. When low, the Q outputs are actively driven; when high, all Q outputs are placed in the high-impedance (3-state) state. Does not affect the stored latch state."
},
{
"number": "2",
"name": "1Q",
"type": "tri_state",
"description": "3-state output for latch channel 1. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "3",
"name": "1D",
"type": "input",
"description": "Data input for latch channel 1. Passes to 1Q while LE is high; captured on LE falling edge."
},
{
"number": "4",
"name": "2D",
"type": "input",
"description": "Data input for latch channel 2. Passes to 2Q while LE is high; captured on LE falling edge."
},
{
"number": "5",
"name": "2Q",
"type": "tri_state",
"description": "3-state output for latch channel 2. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "6",
"name": "3Q",
"type": "tri_state",
"description": "3-state output for latch channel 3. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "7",
"name": "3D",
"type": "input",
"description": "Data input for latch channel 3. Passes to 3Q while LE is high; captured on LE falling edge."
},
{
"number": "8",
"name": "4D",
"type": "input",
"description": "Data input for latch channel 4. Passes to 4Q while LE is high; captured on LE falling edge."
},
{
"number": "9",
"name": "4Q",
"type": "tri_state",
"description": "3-state output for latch channel 4. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference (0 V) for the device."
},
{
"number": "11",
"name": "LE",
"type": "input",
"description": "Latch enable, common to all eight latches. When high, Q outputs transparently follow D inputs; when driven low, the D-input state at the falling edge is latched at the outputs. Setup time 15 ns and hold time 13 ns at 4.5 V."
},
{
"number": "12",
"name": "5Q",
"type": "tri_state",
"description": "3-state output for latch channel 5. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "13",
"name": "5D",
"type": "input",
"description": "Data input for latch channel 5. Passes to 5Q while LE is high; captured on LE falling edge."
},
{
"number": "14",
"name": "6D",
"type": "input",
"description": "Data input for latch channel 6. Passes to 6Q while LE is high; captured on LE falling edge."
},
{
"number": "15",
"name": "6Q",
"type": "tri_state",
"description": "3-state output for latch channel 6. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "16",
"name": "7Q",
"type": "tri_state",
"description": "3-state output for latch channel 7. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "17",
"name": "7D",
"type": "input",
"description": "Data input for latch channel 7. Passes to 7Q while LE is high; captured on LE falling edge."
},
{
"number": "18",
"name": "8D",
"type": "input",
"description": "Data input for latch channel 8. Passes to 8Q while LE is high; captured on LE falling edge."
},
{
"number": "19",
"name": "8Q",
"type": "tri_state",
"description": "3-state output for latch channel 8. Drives ±6 mA at 5 V; enters Hi-Z when OE is high."
},
{
"number": "20",
"name": "VCC",
"type": "power_in",
"description": "Positive supply. Recommended operating range 2 V to 6 V (absolute max 7 V). Bypass with a local 0.1 µF ceramic to GND."
}
],
"provenance": {
"extractor": "ds2sf",
"datasheet": {
"url": "https://www.ti.com/lit/ds/symlink/sn74hc373.pdf",
"pages": 38,
"sha256": "09faaa55733b1ac6",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 20,
"described": 20,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"logic": {
"family_id": "74HC373",
"logic_family": "74HC",
"function_code": "373",
"function_class": "Latch",
"function_name": "Octal D Latch with 3-State Outputs",
"manufacturer": "Texas Instruments",
"is_specialty": false
},
"models_3d": [
{
"file": "sn74hc373.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.3,
12.8,
2.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "sn74hc373-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
10.3,
12.8,
2.75
],
"zmin_mm": 0,
"centre_offset_mm": 0,
"footprint_binding": "identity",
"sha256": "79a0e5065b74351f7c1a06334e2029b9f6ed6e84ffd0e9db1909d096a44d6226",
"checked": "2026-10-07",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
]
},
"metadata": {
"specs": {
"Type": "Octal transparent D latch, 3-state",
"Latches": "8",
"Latch enable": "LE (transparent high, hold low)",
"Output enable": "/OE (active-low, Hi-Z)",
"Logic family": "HC (high-speed CMOS)",
"Supply voltage": "2-6 V",
"Package": "SOIC-20",
"Body (L×W×H)": "12.8 × 7.5 × 2.35 mm"
}
},
"sections": [
"hero",
"viewers",
"readme",
"breadcrumbs",
"info"
],
"discovery_triggers": [
"sn74hc373",
"74hc373",
"octal latch",
"transparent latch",
"address latch"
],
"discovery_pitch": "SN74HC373 octal transparent D latch with 3-state outputs (SOIC-20) with datasheet-verified pinout, KiCad symbol/footprint/3D, and full provenance.",
"author": {
"name": "Ray"
},
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"sn74hc373.kicad_sym",
"sn74hc373.kicad_mod",
"sn74hc373.glb",
"sn74hc373.lbr",
"docs/hero.png",
"docs/sn74hc373-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"sn74hc373-etched.step"
],
"variants": [
{
"mpn": "SN74HC373DW (SOIC-20, tube)",
"kind": "packaging"
},
{
"mpn": "SN74HC373DWR (SOIC-20, tape & reel)",
"kind": "packaging"
}
]
}