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SN74HC367N

Public Made by Adom

by adom

lingxingic Buffers, Drivers, Receivers, Transceivers, DIP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74HC367N

lingxingic · Buffers, Drivers, Receivers, Transceivers · DIP-16

SN74HC367N from lingxingic, in a DIP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Output enable input 1, active LOW; a HIGH level on 1OE puts the affected outputs into the high-impedance OFF-state.
2 1A input Data input 1; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
3 1Y tri_state Data output 1, a 3-state output that follows 1A when enabled and goes high-impedance when its output enable is HIGH.
4 2A input Data input 2; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
5 2Y tri_state Data output 2, a 3-state output that follows 2A when enabled and goes high-impedance when its output enable is HIGH.
6 3A input Data input 3; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
7 3Y tri_state Data output 3, a 3-state output that follows 3A when enabled and goes high-impedance when its output enable is HIGH.
8 GND power_in Ground (0 V) reference for all voltages in the device.
9 4Y tri_state Data output 4, a 3-state output that follows 4A when enabled and goes high-impedance when its output enable is HIGH.
10 4A input Data input 4; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
11 5Y tri_state Data output 5, a 3-state output that follows 5A when enabled and goes high-impedance when its output enable is HIGH.
12 5A input Data input 5; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
13 6Y tri_state Data output 6, a 3-state output that follows 6A when enabled and goes high-impedance when its output enable is HIGH.
14 6A input Data input 6; inputs include clamp diodes so current-limiting resistors can interface them to voltages above VCC.
15 2OE input Output enable input 2, active LOW; a HIGH level on 2OE puts the affected outputs into the high-impedance OFF-state.
16 VCC power_in Supply voltage; recommended 2.0 V to 6.0 V for SN74HC367 (4.5 V to 5.5 V for SN74HCT367), absolute maximum 7.0 V.

Key specifications

Parameter Value
Manufacturer lingxingic
Package DIP-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 7
input clamping current IIK -20 20 mA VI < -0.5V or VI > VCC+0.5V 7
output clamping current IOK -20 20 mA VO < -0.5V or VO > VCC+0.5V 7
output current IO -35 35 mA -0.5V < VO < VCC+0.5V 7
supply current ICC 70 mA 7
ground current IGND -70 mA 7
storage temperature Tstg -65 150 ℃ 7
total power dissipation Ptot 500 mW 7
soldering temperature (DIP) TL 245 ℃ 10s DIP 7
supply voltage VCC 2 5 6 V 7
input voltage VI 0 V 7
output voltage VO 0 V 7
input transition rise and fall rate Δt/ΔV 625 ns/V VCC=2.0V 7
input transition rise and fall rate Δt/ΔV 1.67 139 ns/V VCC=4.5V 7
input transition rise and fall rate Δt/ΔV 83 ns/V VCC=6.0V 7
ambient temperature Tamb -40 125 ℃ 7
HIGH-level input voltage VIH 1.5 1.2 V VCC=2.0V 8
HIGH-level input voltage VIH 3.15 2.4 V VCC=4.5V 8
HIGH-level input voltage VIH 4.2 3.2 V VCC=6.0V 8
LOW-level input voltage VIL 0.8 0.5 V VCC=2.0V 8
LOW-level input voltage VIL 2.1 1.35 V VCC=4.5V 8
LOW-level input voltage VIL 2.8 1.8 V VCC=6.0V 8
HIGH-level output voltage VOH 1.9 2 V VI = VIH or VIL; IO=-20uA; VCC=2.0V 8
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO=-20uA; VCC=4.5V 8
HIGH-level output voltage VOH 5.9 6 V VI = VIH or VIL; IO=-20uA; VCC=6.0V 8
HIGH-level output voltage VOH 3.98 4.32 V VI = VIH or VIL; IO=-6.0mA; VCC=4.5V 8
HIGH-level output voltage VOH 5.48 5.81 V VI = VIH or VIL; IO=-7.8mA; VCC=6.0V 8
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO=20uA; VCC=2.0V 8
LOW-level output voltage VOL 0.15 0.26 V VI = VIH or VIL; IO=6.0mA; VCC=4.5V 8
LOW-level output voltage VOL 0.16 0.26 V VI = VIH or VIL; IO=7.8mA; VCC=6.0V 8
input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V 8
OFF-state output current IOZ -1 1 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND 8
supply current ICC 8 uA VI=VCC or GND; IO=0A; VCC=6.0V 8
HIGH-level input voltage VIH 1.5 V VCC=2.0V (Tamb=-40℃ to +125℃) 10
HIGH-level input voltage VIH 3.15 V VCC=4.5V (Tamb=-40℃ to +125℃) 10
HIGH-level input voltage VIH 4.2 V VCC=6.0V (Tamb=-40℃ to +125℃) 10
LOW-level input voltage VIL 0.5 V VCC=2.0V (Tamb=-40℃ to +125℃) 10
LOW-level input voltage VIL 1.35 V VCC=4.5V (Tamb=-40℃ to +125℃) 10
LOW-level input voltage VIL 1.8 V VCC=6.0V (Tamb=-40℃ to +125℃) 10
HIGH-level output voltage VOH 1.9 V VI = VIH or VIL; IO=-20uA; VCC=2.0V (Tamb=-40℃ to +125℃) 10
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; IO=-20uA; VCC=4.5V (Tamb=-40℃ to +125℃) 10
HIGH-level output voltage VOH 5.9 V VI = VIH or VIL; IO=-20uA; VCC=6.0V (Tamb=-40℃ to +125℃) 10
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO=-6.0mA; VCC=4.5V (Tamb=-40℃ to +125℃) 10
HIGH-level output voltage VOH 5.2 V VI = VIH or VIL; IO=-7.8mA; VCC=6.0V (Tamb=-40℃ to +125℃) 10
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; IO=20uA; VCC=2.0V (Tamb=-40℃ to +125℃) 10
LOW-level output voltage VOL 0.4 V VI = VIH or VIL; IO=6.0mA; VCC=4.5V (Tamb=-40℃ to +125℃) 10
input leakage current II -1 1 uA VI=VCC or GND; VCC=6.0V (Tamb=-40℃ to +125℃) 10
OFF-state output current IOZ -10 10 uA VI=VIH or VIL; VCC=6.0V; VO=VCC or GND (Tamb=-40℃ to +125℃) 10
supply current ICC 160 uA VI=VCC or GND; IO=0A; VCC=6.0V (Tamb=-40℃ to +125℃) 10
nA to nY propagation delay tpd 28 95 ns VCC=2.0V; see Figure 5 11
nA to nY propagation delay tpd 10 19 ns VCC=4.5V; see Figure 5 11
nA to nY propagation delay tpd 8 16 ns VCC=6.0V; see Figure 5 11
nOE to nY enable time ten 44 150 ns VCC=2.0V; see Figure 6 11
nOE to nY enable time ten 16 30 ns VCC=4.5V; see Figure 6 11
nOE to nY enable time ten 13 26 ns VCC=6.0V; see Figure 6 11

CAD (KiCad official)

  • Symbol: SN74HC367N
  • Footprint: Package_DIP:DIP-16_W7.62mm
  • 3D model: DIP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc367n-etched.step / sn74hc367n-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc367n.step / sn74hc367n.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: lingxingic datasheet (19 pp, sha256 1ee99cdc577a8ecf, retrieved 2026-10-16, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF