component
SN74HC367DR
Public Made by Adomby adom
Texas Instruments Buffer/Driver/Transceiver, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownSN74HC367DR
Texas Instruments · Buffer/Driver/Transceiver · SOIC-16
SN74HC367DR from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-low output-enable for bank 1 (outputs 1Y1-1Y4). When low, bank 1 buffers pass A inputs to Y outputs; when high, 1Y1-1Y4 are placed in the high-impedance (Hi-Z) state. |
| 2 | 1A1 | input | Data input to buffer 1 of bank 1. Passed non-inverted to 1Y1 when 1OE is low. |
| 3 | 1Y1 | tri_state | 3-state buffered output of buffer 1 of bank 1 (follows 1A1 when 1OE=L; Hi-Z when 1OE=H). ±6 mA output drive at 5 V. |
| 4 | 1A2 | input | Data input to buffer 2 of bank 1. Passed non-inverted to 1Y2 when 1OE is low. |
| 5 | 1Y2 | tri_state | 3-state buffered output of buffer 2 of bank 1 (follows 1A2 when 1OE=L; Hi-Z when 1OE=H). |
| 6 | 1A3 | input | Data input to buffer 3 of bank 1. Passed non-inverted to 1Y3 when 1OE is low. |
| 7 | 1Y3 | tri_state | 3-state buffered output of buffer 3 of bank 1 (follows 1A3 when 1OE=L; Hi-Z when 1OE=H). |
| 8 | GND | power_in | Ground reference (0 V) for the device. |
| 9 | 1Y4 | tri_state | 3-state buffered output of buffer 4 of bank 1 (follows 1A4 when 1OE=L; Hi-Z when 1OE=H). |
| 10 | 1A4 | input | Data input to buffer 4 of bank 1. Passed non-inverted to 1Y4 when 1OE is low. |
| 11 | 2Y1 | tri_state | 3-state buffered output of buffer 1 of bank 2 (follows 2A1 when 2OE=L; Hi-Z when 2OE=H). |
| 12 | 2A1 | input | Data input to buffer 1 of bank 2. Passed non-inverted to 2Y1 when 2OE is low. |
| 13 | 2Y2 | tri_state | 3-state buffered output of buffer 2 of bank 2 (follows 2A2 when 2OE=L; Hi-Z when 2OE=H). |
| 14 | 2A2 | input | Data input to buffer 2 of bank 2. Passed non-inverted to 2Y2 when 2OE is low. |
| 15 | 2OE | input | Active-low output-enable for bank 2 (outputs 2Y1-2Y2). When low, bank 2 buffers pass A inputs to Y outputs; when high, 2Y1-2Y2 are placed in the high-impedance (Hi-Z) state. |
| 16 | VCC | power_in | Positive supply voltage input. Recommended operating range 2 V to 6 V (absolute max 7 V). A 0.1 µF bypass capacitor (optionally paralleled with 1 µF) is recommended close to this pin. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-16 |
| Category | Logic |
| Pins | 16 |
Ordering variants
Same part, different packaging or reel option.
SN74HC367DRDSN74HC367DRSN74HC367DRJSN74HC367DRNSN74HC367DRNSSN74HC367DRPW
CAD (KiCad official)
- Symbol:
SN74HC367DR - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOIC-16 (KiCad packages3D, STEP)
- 3D model files:
sn74hc367dr-etched.step/sn74hc367dr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);sn74hc367dr.step/sn74hc367dr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
be9892099f45d185, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).