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Contents

README

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SN74HC365PWR

Texas Instruments · Buffers, Drivers, Receivers, Transceivers · TSSOP-16

SN74HC365PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Output-enable input; when OE1 is high (regardless of OE2 or A), all six Y outputs are forced to the high-impedance state, and data passes noninverted from A to Y only when both OE1 and OE2 are low.
2 A1 input Noninverting buffer/driver input for channel 1, passed to output Y1 when OE1 and OE2 are both low.
3 Y1 tri_state 3-state buffer/line-driver output for channel 1, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
4 A2 input Noninverting buffer/driver input for channel 2, passed to output Y2 when OE1 and OE2 are both low.
5 Y2 tri_state 3-state buffer/line-driver output for channel 2, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
6 A3 input Noninverting buffer/driver input for channel 3, passed to output Y3 when OE1 and OE2 are both low.
7 Y3 tri_state 3-state buffer/line-driver output for channel 3, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
8 GND power_in Ground (0 V) reference supply pin for the device.
9 Y4 tri_state 3-state buffer/line-driver output for channel 4, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
10 A4 input Noninverting buffer/driver input for channel 4, passed to output Y4 when OE1 and OE2 are both low.
11 Y5 tri_state 3-state buffer/line-driver output for channel 5, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
12 A5 input Noninverting buffer/driver input for channel 5, passed to output Y5 when OE1 and OE2 are both low.
13 Y6 tri_state 3-state buffer/line-driver output for channel 6, capable of ±6-mA drive at VCC = 5 V and placed in high-impedance state when OE1 or OE2 is high.
14 A6 input Noninverting buffer/driver input for channel 6, passed to output Y6 when OE1 and OE2 are both low.
15 OE2 input Output-enable input; when OE2 is high (regardless of OE1 or A), all six Y outputs are forced to the high-impedance state, and data passes noninverted from A to Y only when both OE1 and OE2 are low.
16 VCC power_in Positive supply voltage pin; operates over the recommended range of 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

CAD (KiCad official)

  • Symbol: SN74HC365PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc365pwr-etched.step / sn74hc365pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc365pwr.step / sn74hc365pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (25 pp, sha256 eb4e4af5a1bded35, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF