main
Ray sn74hc32: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) 9edcc53
{
  "schema_version": 1,
  "type": "component",
  "slug": "sn74hc32",
  "title": "SN74HC32 Quad OR Gate",
  "brief": "Quad 2-input OR gate in the 74HC CMOS family.",
  "version": "0.1.0",
  "license": "CC-BY-SA-4.0",
  "tags": [
    "logic",
    "or-gate",
    "74hc",
    "cmos",
    "ti",
    "soic-14"
  ],
  "component": {
    "mpn": "SN74HC32",
    "manufacturer": "Texas Instruments",
    "package": "SOIC-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gate",
    "datasheet": "https://www.ti.com/lit/ds/symlink/sn74hc32.pdf",
    "parts": {
      "symbol": "sn74hc32.kicad_sym",
      "footprint": "sn74hc32.kicad_mod",
      "model_3d": "sn74hc32-etched.glb",
      "model_3d_plain": "sn74hc32.glb",
      "lbr": "sn74hc32.lbr",
      "model_3d_step": "sn74hc32-etched.step",
      "model_3d_step_plain": "sn74hc32.step"
    },
    "distributor_links": {},
    "pins": [
      {
        "number": "1",
        "name": "1A",
        "type": "input",
        "description": "Channel 1, Input A. Logic input for the first 2-input OR gate. VIH >= 4.2 V and VIL <= 1.8 V at VCC = 6 V."
      },
      {
        "number": "2",
        "name": "1B",
        "type": "input",
        "description": "Channel 1, Input B. Second logic input for OR gate 1. Buffered CMOS input; VIH/VIL scale with VCC per Recommended Operating Conditions."
      },
      {
        "number": "3",
        "name": "1Y",
        "type": "output",
        "description": "Channel 1, Output Y. 1Y = 1A + 1B. Drives up to 10 LSTTL loads; VOH >= 5.48 V and VOL <= 0.33 V at VCC = 6 V."
      },
      {
        "number": "4",
        "name": "2A",
        "type": "input",
        "description": "Channel 2, Input A. Logic input for the second 2-input OR gate."
      },
      {
        "number": "5",
        "name": "2B",
        "type": "input",
        "description": "Channel 2, Input B. Second logic input for OR gate 2."
      },
      {
        "number": "6",
        "name": "2Y",
        "type": "output",
        "description": "Channel 2, Output Y. 2Y = 2A + 2B."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference (0 V) for the device. Connect to system ground with a low-inductance return."
      },
      {
        "number": "8",
        "name": "3Y",
        "type": "output",
        "description": "Channel 3, Output Y. 3Y = 3A + 3B."
      },
      {
        "number": "9",
        "name": "3A",
        "type": "input",
        "description": "Channel 3, Input A. Logic input for the third 2-input OR gate."
      },
      {
        "number": "10",
        "name": "3B",
        "type": "input",
        "description": "Channel 3, Input B. Second logic input for OR gate 3."
      },
      {
        "number": "11",
        "name": "4Y",
        "type": "output",
        "description": "Channel 4, Output Y. 4Y = 4A + 4B."
      },
      {
        "number": "12",
        "name": "4A",
        "type": "input",
        "description": "Channel 4, Input A. Logic input for the fourth 2-input OR gate."
      },
      {
        "number": "13",
        "name": "4B",
        "type": "input",
        "description": "Channel 4, Input B. Second logic input for OR gate 4."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Positive supply. Operating range 2 V to 6 V (5 V nominal); absolute maximum 7 V. Bypass with a 0.1 uF ceramic capacitor to GND close to the pin."
      }
    ],
    "provenance": {
      "extractor": "ds2sf",
      "datasheet": {
        "url": "https://www.ti.com/lit/ds/symlink/sn74hc32.pdf",
        "pages": 38,
        "sha256": "f64e03a2a4c72baf",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "logic": {
      "family_id": "74HC32",
      "logic_family": "74HC",
      "function_code": "32",
      "function_class": "Gate",
      "function_name": "Quad 2-Input OR Gate",
      "manufacturer": "Texas Instruments",
      "is_specialty": false
    },
    "models_3d": [
      {
        "file": "sn74hc32.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "3b9a775da256c8afcc28dcddfbc2eb3f266107fe61ce8446d96f2c52b6f44a70",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "sn74hc32-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6,
          8.7,
          1.75
        ],
        "zmin_mm": 0,
        "centre_offset_mm": 0,
        "footprint_binding": "identity",
        "sha256": "663b85de0cbd599c894b1cdb75738d012510d4d81b6ac4897c3df24aad791dec",
        "checked": "2026-10-07",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ]
  },
  "metadata": {
    "specs": {
      "Type": "Quad 2-input OR gate",
      "Logic family": "74HC (CMOS)",
      "Supply voltage": "2 V to 6 V",
      "Output current": "+-5.2 mA at VCC = 4.5 V",
      "Propagation delay": "9 ns typ at 5 V",
      "Operating temperature": "-40 C to 85 C"
    }
  },
  "sections": [
    "hero",
    "viewers",
    "readme",
    "breadcrumbs",
    "info"
  ],
  "discovery_triggers": [
    "OR gate",
    "logic gate",
    "combinational logic",
    "signal combining"
  ],
  "discovery_pitch": "Four independent 2-input OR gates for glue logic and combining active-high signals.",
  "author": {
    "name": "Ray"
  },
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "sn74hc32.kicad_sym",
    "sn74hc32.kicad_mod",
    "sn74hc32.glb",
    "sn74hc32.lbr",
    "docs/hero.png",
    "docs/sn74hc32-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "sn74hc32-etched.step"
  ],
  "variants": [
    {
      "mpn": "SN74HC32D",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32DB",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32N",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32NS",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32PW",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32J",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32W",
      "kind": "unknown"
    },
    {
      "mpn": "SN74HC32FK",
      "kind": "unknown"
    }
  ]
}