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SN74HC273QPWRQ1

Public Made by Adom

by adom

Texas Instruments Flip Flops, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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SN74HC273QPWRQ1

Texas Instruments · Flip Flops · TSSOP-20

SN74HC273QPWRQ1 from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLR input Active-low direct clear input; when low it forces all Q outputs low regardless of CLK and D.
2 1Q output Single-rail output of flip-flop 1, which takes the value of 1D on the positive-going CLK edge.
3 1D input Data input to flip-flop 1, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
4 2D input Data input to flip-flop 2, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
5 2Q output Single-rail output of flip-flop 2, which takes the value of 2D on the positive-going CLK edge.
6 3Q output Single-rail output of flip-flop 3, which takes the value of 3D on the positive-going CLK edge.
7 3D input Data input to flip-flop 3, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
8 4D input Data input to flip-flop 4, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
9 4Q output Single-rail output of flip-flop 4, which takes the value of 4D on the positive-going CLK edge.
10 GND power_in Device ground reference pin.
11 CLK input Clock input; data is transferred to the Q outputs on the positive-going edge, and D has no effect while CLK is high or low.
12 5Q output Single-rail output of flip-flop 5, which takes the value of 5D on the positive-going CLK edge.
13 5D input Data input to flip-flop 5, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
14 6D input Data input to flip-flop 6, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
15 6Q output Single-rail output of flip-flop 6, which takes the value of 6D on the positive-going CLK edge.
16 7Q output Single-rail output of flip-flop 7, which takes the value of 7D on the positive-going CLK edge.
17 7D input Data input to flip-flop 7, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
18 8D input Data input to flip-flop 8, which must meet the setup and hold time requirements relative to the positive-going CLK edge.
19 8Q output Single-rail output of flip-flop 8, which takes the value of 8D on the positive-going CLK edge.
20 VCC power_in Supply voltage pin; the recommended operating range is 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: SN74HC273QPWRQ1
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: sn74hc273qpwrq1-etched.step / sn74hc273qpwrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc273qpwrq1.step / sn74hc273qpwrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (16 pp, sha256 d61ed979e031facb, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF