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Contents

README

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SN74HC259PWR

Texas Instruments · Global Sourcing Parts · TSSOP-16

SN74HC259PWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S0 input Address select input 0 (LSB); with S1 and S2 selects which of the eight latches (0-7) is addressed per the Latch Selection Table.
2 S1 input Address select input 1; with S0 and S2 selects which of the eight latches (0-7) is addressed per the Latch Selection Table.
3 S2 input Address select input 2 (MSB); with S0 and S1 selects which of the eight latches (0-7) is addressed per the Latch Selection Table.
4 Q0 output Latch output 0; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
5 Q1 output Latch output 1; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
6 Q2 output Latch output 2; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
7 Q3 output Latch output 3; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
8 GND power_in Ground reference for the device.
9 Q4 output Latch output 4; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
10 Q5 output Latch output 5; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
11 Q6 output Latch output 6; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
12 Q7 output Latch output 7; in addressable-latch or demultiplex mode follows the D input when addressed, otherwise holds its previous state or is forced low by CLR.
13 D input Serial/parallel data input written into the addressed latch when G is active (low) and CLR is high (per the Function Table).
14 G input Active-low enable input; when low the addressed latch follows D (addressable-latch mode) or the device operates as a 1-of-8 demultiplexer; when high (inactive) all latches hold their previous state (memory mode) and address lines can change without corrupting data.
15 CLR input Active-low asynchronous parallel clear; when low, all eight outputs are forced low regardless of the address and data inputs (with G high) or configures 1-of-8 demultiplexer mode (with G low).
16 VCC power_in Positive supply voltage, recommended operating range 2 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Global Sourcing Parts
Pins 16

CAD (KiCad official)

  • Symbol: SN74HC259PWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc259pwr-etched.step / sn74hc259pwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc259pwr.step / sn74hc259pwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (31 pp, sha256 67c45d0fc39d1b0e, retrieved 2026-09-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-sonnet-5 (text+vision), consensus claude-opus-4-8 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF