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SN74HC251PW

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Texas Instruments Signal Switches, Multiplexers, Decoders, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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docs sn74hc251pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
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package.json Publish 0.1.0 · Ray 2mo ago
page.json sn74hc251pw: component.models_3d pose record per STEP (Z-up, seated z=0, pad-centre origin, identity binding) · Ray 1mo ago
README.md sn74hc251pw: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray 1mo ago
sn74hc251pw-etched.fit.json sn74hc251pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
sn74hc251pw-etched.glb sn74hc251pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
sn74hc251pw-etched.step sn74hc251pw: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray 1mo ago
sn74hc251pw.glb Publish 0.1.0 · Ray 2mo ago
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sn74hc251pw.step Publish 0.1.0 · Ray 2mo ago

SN74HC251PW

Texas Instruments · Signal Switches, Multiplexers, Decoders · TSSOP-16

SN74HC251PW from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D3 input Data input D3. Routed to the Y/W outputs when the select code (C,B,A) = (0,1,1) and /OE is low. CMOS logic input, VIH/VIL per VCC (e.g. 3.15 V/1.35 V at VCC = 4.5 V), input current ±1 μA max.
2 D2 input Data input D2. Selected to the outputs when (C,B,A) = (0,1,0) and /OE is low. Standard HC-family CMOS input.
3 D1 input Data input D1. Selected to the outputs when (C,B,A) = (0,0,1) and /OE is low. Standard HC-family CMOS input.
4 D0 input Data input D0. Selected to the outputs when (C,B,A) = (0,0,0) and /OE is low. Standard HC-family CMOS input.
5 Y tri_state True (non-inverted) 3-state data output. Drives the selected Dn value; goes to high-impedance (Z) when /OE is high. ±6 mA drive at VCC = 5 V; interfaces directly with system bus or drives up to 15 LSTTL loads.
6 W tri_state Complementary (inverted) 3-state data output. Drives the logical inverse of the selected Dn; goes to high-impedance (Z) when /OE is high. ±6 mA drive at VCC = 5 V.
7 /OE input Active-low output enable (strobe). When high, both Y and W outputs are placed in the high-impedance (3-state) state regardless of select or data inputs; when low, the selected Dn drives Y (true) and W (inverted). Standard CMOS input, ±1 μA max input current.
8 GND power_in Device ground reference (0 V). All input/output voltages are referenced to this pin. Tie to system ground with a low-impedance return; place bypass capacitor between VCC (pin 16) and GND close to the device.
9 A input Select input A (LSB of the 3-bit binary select code A/B/C that chooses one of D0-D7). Standard HC-family CMOS input; all unused inputs must be tied to VCC or GND.
10 B input Select input B (middle bit of the 3-bit select code). CMOS logic input.
11 C input Select input C (MSB of the 3-bit select code). CMOS logic input.
12 D7 input Data input D7. Selected to the outputs when (C,B,A) = (1,1,1) and /OE is low. Standard HC-family CMOS input.
13 D6 input Data input D6. Selected to the outputs when (C,B,A) = (1,1,0) and /OE is low. Standard HC-family CMOS input.
14 D5 input Data input D5. Selected to the outputs when (C,B,A) = (1,0,1) and /OE is low. Standard HC-family CMOS input.
15 D4 input Data input D4. Selected to the outputs when (C,B,A) = (1,0,0) and /OE is low. Standard HC-family CMOS input.
16 VCC power_in Positive supply voltage, 2 V to 6 V (nominal 5 V). Quiescent ICC of 80 μA max at VCC = 6 V. Bypass with a 0.1 μF ceramic capacitor to GND close to the device (parallel with 1 μF is common).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Logic
Pins 16

Ordering variants

Same part, different packaging or reel option.

  • SN74HC251PW
  • SN74HC251PWR
  • SN74HC251PWR1G4
  • SN74HC251PWT
  • SN74HC251PWD
  • SN74HC251PWDR
  • SN74HC251PWDRG4
  • SN74HC251PWDT
  • SN74HC251PWDB
  • SN74HC251PWDBR
  • SN74HC251PWN
  • SN74HC251PWNS
  • SN74HC251PWNSR
  • SN74HC251PWJ
  • SN74HC251PWFK

CAD (KiCad official)

  • Symbol: SN74HC251PW
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: sn74hc251pw-etched.step / sn74hc251pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); sn74hc251pw.step / sn74hc251pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (None pp, sha256 407441728ca2e20f, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF